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authorLinus Torvalds <torvalds@linux-foundation.org>2016-12-13 19:54:27 +0300
committerLinus Torvalds <torvalds@linux-foundation.org>2016-12-13 19:54:27 +0300
commitb8d2798f32785398fcd1c48ea80c0c6c5ab88537 (patch)
treec5c51d5036c8917bcf35311bf4bf32d3886b8f9c /arch/arm64/boot
parent961288108e26e5024801c75d0e7c8e9a2de2b02b (diff)
parent2aab7a2055a1705c9e30920d95a596226999eb21 (diff)
downloadlinux-b8d2798f32785398fcd1c48ea80c0c6c5ab88537.tar.xz
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd: "This is a fairly quiet release. We don't have any patches to the core framework. The only patch that can even be considered "core" adds another clk_get() variant. The rest of the changes are in drivers for various SoCs, and we have a few bits for ARM shmobile architecture code (dts and mach) due to the dependency we're breaking between shmobile architecture code and its clk driver. Those shmobile bits have also been pulled into arm-soc tree. Here's the summary: Core: - Support for devm_get_clk_from_child() used with DT bindings that have subnodes with the 'clocks' property New Drivers: - Allwinner A64 (sun50i) - i.MX imx6ull - Socionext's UniPhier SoC CPUs - Mediatek MT2701 SoCs - Rockchip rk1108 SoCs - Qualcomm MSM8994/MSM8992 SoCS - Qualcomm RPM Clocks - Hisilicon Hi3516CV300 and Hi3798CV200 CRG - Oxford Semiconductor OX820 and OX810SE SoCs - Renesas RZ/G1M and RZ/GIE SoCs - Renesas R-Car RST driver for mode pin states Updates: - Four Allwinner SoCs are migrated to the new style clk driver - Rockchip rk3399,rk3066 PLL optimizations - i.MX LVDS display glitch fixes and AV PLL precision improvements - Qualcomm MSM8996 GPU GDSCs, hw controlled GDSCs, and Alpha PLL support - Explicit demodularization of always builtin drivers - Freescale Qoriq ls1012a and ls1046a support - Exynos 5433 parent typo fix and critical clock tagging - Renesas r8a7743/r8a7745 CPG - Renesas R-Car M3-W CSI2/VIN/SYS-DMAC/(H)SCIF/I2C/DRIF/gfx support - stm32f4* LSI, LSE, RTC, and QSPI clocks - pxa27x and pxa25x cpufreq as clks - TI omap36xx sprz319 advisory 2.1 workaround - Broadcom bcm2835 rate change propogation to PLLH_AUX from VEC" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (150 commits) clk: bcm: Fix 'maybe-uninitialized' warning in bcm2835_clock_choose_div_and_prate() clk: add devm_get_clk_from_child() API clk: st: clk-flexgen: Unmap region obtained by of_iomap clk: keystone: pll: Unmap region obtained by of_iomap clk:mmp:clk-of-mmp2: Free memory and Unmap region obtained by kzalloc and of_iomap clk:mmp:clk-of-pxa910: Free memory and Unmap region obtained by kzmalloc and of_iomap clk: mmp: clk-of-pxa1928: Free memory obtained by kzalloc clk: cdce925: Fix limit check clk: bcm: Make COMMON_CLK_IPROC into a library clk: qoriq: added ls1012a clock configuration clk: ti: dra7: fix "failed to lookup clock node gmac_gmii_ref_clk_div" boot message clk: bcm: Allow rate change propagation to PLLH_AUX on VEC clock clk: bcm: Support rate change propagation on bcm2835 clocks clk: bcm2835: Avoid overwriting the div info when disabling a pll_div clk clk: ti: omap36xx: Work around sprz319 advisory 2.1 clk: clk-wm831x: fix a logic error clk: uniphier: add cpufreq data for LD11, LD20 SoCs clk: uniphier: add CPU-gear change (cpufreq) support clk: qcom: Put venus core0/1 gdscs to hw control mode clk: qcom: gdsc: Add support for gdscs with HW control ...
Diffstat (limited to 'arch/arm64/boot')
-rw-r--r--arch/arm64/boot/dts/renesas/r8a7795.dtsi5
-rw-r--r--arch/arm64/boot/dts/renesas/r8a7796.dtsi5
2 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index 8c15040f2540..625dda713548 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -321,6 +321,11 @@
#power-domain-cells = <0>;
};
+ rst: reset-controller@e6160000 {
+ compatible = "renesas,r8a7795-rst";
+ reg = <0 0xe6160000 0 0x0200>;
+ };
+
sysc: system-controller@e6180000 {
compatible = "renesas,r8a7795-sysc";
reg = <0 0xe6180000 0 0x0400>;
diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
index 9217da983525..75c8c55a8248 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
@@ -233,6 +233,11 @@
#power-domain-cells = <0>;
};
+ rst: reset-controller@e6160000 {
+ compatible = "renesas,r8a7796-rst";
+ reg = <0 0xe6160000 0 0x0200>;
+ };
+
sysc: system-controller@e6180000 {
compatible = "renesas,r8a7796-sysc";
reg = <0 0xe6180000 0 0x0400>;