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| author | Aswath Govindraju <a-govindraju@ti.com> | 2022-05-12 09:48:58 +0300 |
|---|---|---|
| committer | Nishanth Menon <nm@ti.com> | 2022-06-18 04:24:01 +0300 |
| commit | 0c0af88f3f318e73237f7fadd02d0bf2b6c996bb (patch) | |
| tree | 203d2f6fa782914ca6372a3749e0312feb89c88c /arch/arm64/boot | |
| parent | 856216b70a41ff3f8c866b627546afa01567b389 (diff) | |
| download | linux-0c0af88f3f318e73237f7fadd02d0bf2b6c996bb.tar.xz | |
arm64: dts: ti: k3-am64-main: Remove support for HS400 speed mode
AM64 SoC, does not support HS400 and HS200 is the maximum supported speed
mode[1]. Therefore, fix the device tree node to reflect the same.
[1] - https://www.ti.com/lit/ds/symlink/am6442.pdf
(SPRSP56C – JANUARY 2021 – REVISED FEBRUARY 2022)
Fixes: 8abae9389bdb ("arm64: dts: ti: Add support for AM642 SoC")
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20220512064859.32059-1-a-govindraju@ti.com
Diffstat (limited to 'arch/arm64/boot')
| -rw-r--r-- | arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi index f64b368c6c37..cdb530597c5e 100644 --- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi @@ -456,13 +456,11 @@ clock-names = "clk_ahb", "clk_xin"; mmc-ddr-1_8v; mmc-hs200-1_8v; - mmc-hs400-1_8v; ti,trm-icp = <0x2>; ti,otap-del-sel-legacy = <0x0>; ti,otap-del-sel-mmc-hs = <0x0>; ti,otap-del-sel-ddr52 = <0x6>; ti,otap-del-sel-hs200 = <0x7>; - ti,otap-del-sel-hs400 = <0x4>; }; sdhci1: mmc@fa00000 { |