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| author | Kunihiko Hayashi <hayashi.kunihiko@socionext.com> | 2020-04-03 04:43:07 +0300 |
|---|---|---|
| committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2020-05-04 03:24:14 +0300 |
| commit | 8f664ce7eda58dbc7d75dc9ff41d04786d284256 (patch) | |
| tree | 3c1cb17d0bea8d053e16836799ce453461045043 /arch/arm64/boot/dts | |
| parent | 44f0746d60bcb575f2268a707e56c37208841e31 (diff) | |
| download | linux-8f664ce7eda58dbc7d75dc9ff41d04786d284256.tar.xz | |
arm64: dts: uniphier: Stabilize Ethernet RGMII mode of PXs3 ref board
The RGMII PHY implemented in PXs3 ref board needs to change
drive-strength properties of the Ethernet Tx pins to stabilize the PHY.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm64/boot/dts')
| -rw-r--r-- | arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts b/arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts index dc39a73dc781..7c30c6b56b57 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts +++ b/arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts @@ -132,3 +132,19 @@ reg = <0>; }; }; + +&pinctrl_ether_rgmii { + tx { + pins = "RGMII0_TXCLK", "RGMII0_TXD0", "RGMII0_TXD1", + "RGMII0_TXD2", "RGMII0_TXD3", "RGMII0_TXCTL"; + drive-strength = <9>; + }; +}; + +&pinctrl_ether1_rgmii { + tx { + pins = "RGMII1_TXCLK", "RGMII1_TXD0", "RGMII1_TXD1", + "RGMII1_TXD2", "RGMII1_TXD3", "RGMII1_TXCTL"; + drive-strength = <9>; + }; +}; |