diff options
| author | Michal Simek <michal.simek@amd.com> | 2023-05-22 17:59:48 +0300 |
|---|---|---|
| committer | Michal Simek <michal.simek@amd.com> | 2023-06-05 14:15:02 +0300 |
| commit | c720a1f5e6ee8cb39c28435efc0819cec84d6ee2 (patch) | |
| tree | 9f85c67baa3c770de533681e8de135fa709c865b /arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts | |
| parent | 4e4ddd3d1dee009a26a8a74822d4761287768a95 (diff) | |
| download | linux-c720a1f5e6ee8cb39c28435efc0819cec84d6ee2.tar.xz | |
arm64: zynqmp: Describe TI phy as ethernet-phy-id
TI DP83867 is using strapping based on MIO pins. Tristate setup can
influence PHY address. That's why switch description with ethernet-phy-id
compatible string which enable calling reset. PHY itself setups phy address
after power up or reset. Phy reset is done via gpio.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/b49904649a363f40dc9c4d3fa275e42129562082.1684767562.git.michal.simek@amd.com
Diffstat (limited to 'arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts')
| -rw-r--r-- | arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts | 22 |
1 files changed, 15 insertions, 7 deletions
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts index f76687914e30..0d9b6081dff6 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts @@ -2,7 +2,8 @@ /* * dts file for Xilinx ZynqMP ZCU111 * - * (C) Copyright 2017 - 2021, Xilinx, Inc. + * (C) Copyright 2017 - 2022, Xilinx, Inc. + * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. * * Michal Simek <michal.simek@amd.com> */ @@ -172,12 +173,19 @@ phy-mode = "rgmii-id"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gem3_default>; - phy0: ethernet-phy@c { - reg = <0xc>; - ti,rx-internal-delay = <0x8>; - ti,tx-internal-delay = <0xa>; - ti,fifo-depth = <0x1>; - ti,dp83867-rxctrl-strap-quirk; + mdio: mdio { + #address-cells = <1>; + #size-cells = <0>; + phy0: ethernet-phy@c { + #phy-cells = <1>; + compatible = "ethernet-phy-id2000.a231"; + reg = <0xc>; + ti,rx-internal-delay = <0x8>; + ti,tx-internal-delay = <0xa>; + ti,fifo-depth = <0x1>; + ti,dp83867-rxctrl-strap-quirk; + reset-gpios = <&tca6416_u22 6 GPIO_ACTIVE_LOW>; + }; }; }; |