diff options
| author | Wolfram Sang <wsa+renesas@sang-engineering.com> | 2022-07-11 16:46:55 +0300 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-08-15 12:11:57 +0300 |
| commit | 6a24768c6e301a48c0610f0fac6f4461750ebf16 (patch) | |
| tree | 626cab7d815166ae1901ebeaca151205c66f2714 /arch/arm64/boot/dts/renesas/r8a779f0.dtsi | |
| parent | 568035b01cfb107af8d2e4bd2fb9aea22cf5b868 (diff) | |
| download | linux-6a24768c6e301a48c0610f0fac6f4461750ebf16.tar.xz | |
arm64: dts: renesas: r8a779f0: Add SDHI0 support
Extracted from a larger BSP patch made by Linh Phung.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20220711134656.277730-3-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'arch/arm64/boot/dts/renesas/r8a779f0.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/renesas/r8a779f0.dtsi | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a779f0.dtsi b/arch/arm64/boot/dts/renesas/r8a779f0.dtsi index 384817ffa4de..0c59a93cbaaa 100644 --- a/arch/arm64/boot/dts/renesas/r8a779f0.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779f0.dtsi @@ -670,6 +670,19 @@ <&ipmmu_ds0 30>, <&ipmmu_ds0 31>; }; + mmc0: mmc@ee140000 { + compatible = "renesas,sdhi-r8a779f0", + "renesas,rcar-gen4-sdhi"; + reg = <0 0xee140000 0 0x2000>; + interrupts = <GIC_SPI 236 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 706>, <&cpg CPG_CORE R8A779F0_CLK_SD0H>; + clock-names = "core", "clkh"; + power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; + resets = <&cpg 706>; + max-frequency = <200000000>; + status = "disabled"; + }; + ipmmu_rt0: iommu@ee480000 { compatible = "renesas,ipmmu-r8a779f0", "renesas,rcar-gen4-ipmmu-vmsa"; |