diff options
author | Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> | 2017-11-24 23:59:44 +0300 |
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committer | Simon Horman <horms+renesas@verge.net.au> | 2017-12-04 11:36:26 +0300 |
commit | cc3e267e9bb0ce7fead857f9258268ffa5f51b91 (patch) | |
tree | e386213c1b341f33610eb0237d01a4a31604e4dc /arch/arm64/boot/dts/renesas/r8a77970-v3msk.dts | |
parent | 2ebdfea2bbf12c7e5c636fbb4d8616f2027e86f7 (diff) | |
download | linux-cc3e267e9bb0ce7fead857f9258268ffa5f51b91.tar.xz |
arm64: dts: renesas: initial V3MSK board device tree
Add the initial device tree for the V3M Starter Kit board.
The board has 1 debug serial port (SCIF0); include support for it,
so that the serial console can work.
Based on the original (and large) patch by Vladimir Barinov.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm64/boot/dts/renesas/r8a77970-v3msk.dts')
-rw-r--r-- | arch/arm64/boot/dts/renesas/r8a77970-v3msk.dts | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a77970-v3msk.dts b/arch/arm64/boot/dts/renesas/r8a77970-v3msk.dts new file mode 100644 index 000000000000..50f49212f54e --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a77970-v3msk.dts @@ -0,0 +1,44 @@ +/* + * Device Tree Source for the V3M Starter Kit board + * + * Copyright (C) 2017 Renesas Electronics Corp. + * Copyright (C) 2017 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +/dts-v1/; +#include "r8a77970.dtsi" + +/ { + model = "Renesas V3M Starter Kit board"; + compatible = "renesas,v3msk", "renesas,r8a77970"; + + aliases { + serial0 = &scif0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@48000000 { + device_type = "memory"; + /* first 128MB is reserved for secure area. */ + reg = <0x0 0x48000000 0x0 0x38000000>; + }; +}; + +&extal_clk { + clock-frequency = <16666666>; +}; + +&extalr_clk { + clock-frequency = <32768>; +}; + +&scif0 { + status = "okay"; +}; |