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authorTaniya Das <quic_tdas@quicinc.com>2023-05-24 17:06:56 +0300
committerBjorn Andersson <andersson@kernel.org>2023-05-25 07:50:44 +0300
commit3c678552b00f90387de14ae965ab6c0bafe8ea12 (patch)
treeb5c69a0578589d8dfb53b57cb776b5d2441e92ee /arch/arm64/boot/dts/qcom/sm8450.dtsi
parente23893dbc304a2a35ecbaeabbc7d0fb20fc6acd8 (diff)
downloadlinux-3c678552b00f90387de14ae965ab6c0bafe8ea12.tar.xz
arm64: dts: qcom: sm8450: Add video clock controller
Add device node for video clock controller on Qualcomm SM8450 platform. Signed-off-by: Taniya Das <quic_tdas@quicinc.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230524140656.7076-4-quic_tdas@quicinc.com
Diffstat (limited to 'arch/arm64/boot/dts/qcom/sm8450.dtsi')
-rw-r--r--arch/arm64/boot/dts/qcom/sm8450.dtsi13
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index 6de3327d9b32..174a23bd3e58 100644
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -8,6 +8,7 @@
#include <dt-bindings/clock/qcom,rpmh.h>
#include <dt-bindings/clock/qcom,sm8450-camcc.h>
#include <dt-bindings/clock/qcom,sm8450-dispcc.h>
+#include <dt-bindings/clock/qcom,sm8450-videocc.h>
#include <dt-bindings/dma/qcom-gpi.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/mailbox/qcom-ipcc.h>
@@ -2598,6 +2599,18 @@
};
};
+ videocc: clock-controller@aaf0000 {
+ compatible = "qcom,sm8450-videocc";
+ reg = <0 0x0aaf0000 0 0x10000>;
+ clocks = <&rpmhcc RPMH_CXO_CLK>,
+ <&gcc GCC_VIDEO_AHB_CLK>;
+ power-domains = <&rpmhpd SM8450_MMCX>;
+ required-opps = <&rpmhpd_opp_low_svs>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ #power-domain-cells = <1>;
+ };
+
cci0: cci@ac15000 {
compatible = "qcom,sm8450-cci", "qcom,msm8996-cci";
reg = <0 0x0ac15000 0 0x1000>;