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| author | Sibi Sankar <sibis@codeaurora.org> | 2020-02-27 13:56:30 +0300 |
|---|---|---|
| committer | Bjorn Andersson <bjorn.andersson@linaro.org> | 2020-03-06 08:45:27 +0300 |
| commit | 74f26599809c870c2d744332591e7622b104de26 (patch) | |
| tree | 3e31833842d378915db2a9fd245a067299068738 /arch/arm64/boot/dts/qcom/sdm845.dtsi | |
| parent | b1b24dd7a676b4f2403535d82307f0911a77c1ad (diff) | |
| download | linux-74f26599809c870c2d744332591e7622b104de26.tar.xz | |
arm64: dts: qcom: sdm845: Add OSM L3 interconnect provider
Add Operation State Manager (OSM) L3 interconnect provider on SDM845 SoCs.
Acked-by: Georgi Djakov <georgi.djakov@linaro.org>
Reviewed-by: Evan Green <evgreen@chromium.org>
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20200227105632.15041-7-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Diffstat (limited to 'arch/arm64/boot/dts/qcom/sdm845.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sdm845.dtsi | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 3da382b502e9..c7ddf215c57e 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -3560,6 +3560,16 @@ }; }; + osm_l3: interconnect@17d41000 { + compatible = "qcom,sdm845-osm-l3"; + reg = <0 0x17d41000 0 0x1400>; + + clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>; + clock-names = "xo", "alternate"; + + #interconnect-cells = <1>; + }; + cpufreq_hw: cpufreq@17d43000 { compatible = "qcom,cpufreq-hw"; reg = <0 0x17d43000 0 0x1400>, <0 0x17d45800 0 0x1400>; |