diff options
| author | Sibi Sankar <sibis@codeaurora.org> | 2021-07-29 21:04:44 +0300 |
|---|---|---|
| committer | Bjorn Andersson <bjorn.andersson@linaro.org> | 2021-08-05 18:27:34 +0300 |
| commit | 11e03d692101e484df9322f892a8b6e111a82bfd (patch) | |
| tree | e91fa975e8c8043598a4866093f138bfb329ed1c /arch/arm64/boot/dts/qcom/sc7280.dtsi | |
| parent | 53bc6b4170d574e410b2123c37be03ad34e13c09 (diff) | |
| download | linux-11e03d692101e484df9322f892a8b6e111a82bfd.tar.xz | |
arm64: dts: qcom: sc7280: Fixup the cpufreq node
Fixup the register regions used by the cpufreq node on SC7280 SoC to
support per core L3 DCVS.
Fixes: 7dbd121a2c58 ("arm64: dts: qcom: sc7280: Add cpufreq hw node")
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/1627581885-32165-4-git-send-email-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Diffstat (limited to 'arch/arm64/boot/dts/qcom/sc7280.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sc7280.dtsi | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index b5a5685193c4..dbbeb3a94a6d 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -1795,9 +1795,9 @@ cpufreq_hw: cpufreq@18591000 { compatible = "qcom,cpufreq-epss"; - reg = <0 0x18591000 0 0x1000>, - <0 0x18592000 0 0x1000>, - <0 0x18593000 0 0x1000>; + reg = <0 0x18591100 0 0x900>, + <0 0x18592100 0 0x900>, + <0 0x18593100 0 0x900>; clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>; clock-names = "xo", "alternate"; #freq-domain-cells = <1>; |