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author | Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | 2022-12-26 07:21:52 +0300 |
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committer | Bjorn Andersson <andersson@kernel.org> | 2022-12-27 20:59:26 +0300 |
commit | 1eb309964e6384eda56c2d2816c3857c0b7c3ea6 (patch) | |
tree | eeeb55e0a7fd16f94ed9eb0384e0853ee8779f93 /arch/arm64/boot/dts/qcom/qcs404.dtsi | |
parent | 41a37d157a613444c97e8f71a5fb2a21116b70d7 (diff) | |
download | linux-1eb309964e6384eda56c2d2816c3857c0b7c3ea6.tar.xz |
arm64: dts: qcom: qcs404: add power-domains-cells to gcc node
As gcc now provides two GDSCs, add #power-domain-cells property to the
gcc device node.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221226042154.2666748-15-dmitry.baryshkov@linaro.org
Diffstat (limited to 'arch/arm64/boot/dts/qcom/qcs404.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/qcom/qcs404.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi index 502dd6db491e..e7c32d569711 100644 --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi @@ -729,6 +729,7 @@ reg = <0x01800000 0x80000>; #clock-cells = <1>; #reset-cells = <1>; + #power-domain-cells = <1>; assigned-clocks = <&gcc GCC_APSS_AHB_CLK_SRC>; assigned-clock-rates = <19200000>; |