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author | Bjorn Andersson <bjorn.andersson@linaro.org> | 2018-11-18 23:01:33 +0300 |
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committer | Andy Gross <andy.gross@linaro.org> | 2019-01-25 07:21:17 +0300 |
commit | 5bb9ab94f43ba56d048e101df645349c72a15da9 (patch) | |
tree | 225087b6d04b4df582c9ba12d91df5f05d5b609c /arch/arm64/boot/dts/qcom/qcs404.dtsi | |
parent | 1d918e9a8cc7306ae6a0b0c5580f57cfd1122d6f (diff) | |
download | linux-5bb9ab94f43ba56d048e101df645349c72a15da9.tar.xz |
arm64: dts: qcom: qcs404: Specify pinctrl state for UART
BLSP1 UART2 is used as debug uart on the EVB development board, define
pinmux state for the UART in the platform dtsi and pinconf state for it
in the board dts.
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Diffstat (limited to 'arch/arm64/boot/dts/qcom/qcs404.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/qcom/qcs404.dtsi | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi index f3d77e7ee0d2..dd918d35f270 100644 --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi @@ -272,6 +272,18 @@ #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; + + blsp1_uart2_default: blsp1-uart2-default { + rx { + pins = "gpio18"; + function = "blsp_uart_rx_a2"; + }; + + tx { + pins = "gpio17"; + function = "blsp_uart_tx_a2"; + }; + }; }; gcc: clock-controller@1800000 { @@ -343,6 +355,8 @@ clock-names = "core", "iface"; dmas = <&blsp1_dma 5>, <&blsp1_dma 4>; dma-names = "rx", "tx"; + pinctrl-names = "default"; + pinctrl-0 = <&blsp1_uart2_default>; status = "okay"; }; |