diff options
| author | Bjorn Andersson <bjorn.andersson@linaro.org> | 2018-09-04 08:01:17 +0300 |
|---|---|---|
| committer | Andy Gross <andy.gross@linaro.org> | 2018-09-13 21:56:25 +0300 |
| commit | 31c1f0e33debb9a82036b80310dc4edd6e038087 (patch) | |
| tree | 25a2ad13980ba9bbef0eb4642710da2ca4334c2f /arch/arm64/boot/dts/qcom/msm8998.dtsi | |
| parent | 4807c71cc6886f127abbfbfe912c8bf5015e3798 (diff) | |
| download | linux-31c1f0e33debb9a82036b80310dc4edd6e038087.tar.xz | |
arm64: dts: qcom: msm8998: Add RPM and regulators for MTP
Add nodes for RPM communication for MSM8998 and the regulator nodes for
the MTP.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Diffstat (limited to 'arch/arm64/boot/dts/qcom/msm8998.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/qcom/msm8998.dtsi | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi index e52a68421480..539a1bc94e38 100644 --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi @@ -210,6 +210,19 @@ method = "smc"; }; + rpm-glink { + compatible = "qcom,glink-rpm"; + + interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>; + qcom,rpm-msg-ram = <&rpm_msg_ram>; + mboxes = <&apcs_glb 0>; + + rpm_requests: rpm-requests { + compatible = "qcom,rpm-msm8998"; + qcom,glink-channels = "rpm_requests"; + }; + }; + timer { compatible = "arm,armv8-timer"; interrupts = <GIC_PPI 1 IRQ_TYPE_LEVEL_LOW>, @@ -224,6 +237,11 @@ ranges = <0 0 0 0xffffffff>; compatible = "simple-bus"; + rpm_msg_ram: memory@68000 { + compatible = "qcom,rpm-msg-ram"; + reg = <0x778000 0x7000>; + }; + gcc: clock-controller@100000 { compatible = "qcom,gcc-msm8998"; #clock-cells = <1>; @@ -261,6 +279,13 @@ cell-index = <0>; }; + apcs_glb: mailbox@9820000 { + compatible = "qcom,msm8998-apcs-hmss-global"; + reg = <0x17911000 0x1000>; + + #mbox-cells = <1>; + }; + blsp2_uart1: serial@c1b0000 { compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; reg = <0xc1b0000 0x1000>; |