diff options
| author | Baruch Siach <baruch@tkos.co.il> | 2021-07-22 13:01:07 +0300 |
|---|---|---|
| committer | Bjorn Andersson <bjorn.andersson@linaro.org> | 2021-08-05 18:27:34 +0300 |
| commit | 53bc6b4170d574e410b2123c37be03ad34e13c09 (patch) | |
| tree | 00b2f35534b067818c913a072b37972b34b21b08 /arch/arm64/boot/dts/qcom/ipq6018.dtsi | |
| parent | b22d313e177281e0c87dbc8725704e4952bb910a (diff) | |
| download | linux-53bc6b4170d574e410b2123c37be03ad34e13c09.tar.xz | |
arm64: dts: qcom: ipq6018: correct TCSR block area
According to Bjorn Andersson[1], &tcsr_q6 base is 0x01937000 with size
0x21000. Adjust qcom,halt-regs offsets (add 0xe000) to match the new
syscon base.
Also, rename to just &tcsr as Kathiravan T suggested.
[1] https://lore.kernel.org/r/YLgO0Aj1d4w9EcPv@yoga
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Link: https://lore.kernel.org/r/889aae1b88f120cb6281919d27164a959fbe69d0.1626948070.git.baruch@tkos.co.il
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Diffstat (limited to 'arch/arm64/boot/dts/qcom/ipq6018.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/qcom/ipq6018.dtsi | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi index 1549c2cf8813..66da336894eb 100644 --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi @@ -258,9 +258,9 @@ reg = <0x0 0x01905000 0x0 0x8000>; }; - tcsr_q6: syscon@1945000 { + tcsr: syscon@1937000 { compatible = "syscon"; - reg = <0x0 0x01945000 0x0 0xe000>; + reg = <0x0 0x01937000 0x0 0x21000>; }; blsp_dma: dma-controller@7884000 { @@ -504,7 +504,7 @@ clocks = <&gcc GCC_PRNG_AHB_CLK>; clock-names = "prng"; - qcom,halt-regs = <&tcsr_q6 0xa000 0xd000 0x0>; + qcom,halt-regs = <&tcsr 0x18000 0x1b000 0xe000>; qcom,smem-states = <&wcss_smp2p_out 0>, <&wcss_smp2p_out 1>; |