diff options
| author | Lars Povlsen <lars.povlsen@microchip.com> | 2020-08-24 23:30:10 +0300 |
|---|---|---|
| committer | Lars Povlsen <lars.povlsen@microchip.com> | 2020-09-16 12:39:51 +0300 |
| commit | 5df50128050d01d300f28d9bca4dd89d6d24de3d (patch) | |
| tree | 105b4aa8847c9208795c574af14807b94fbc2cce /arch/arm64/boot/dts/microchip/sparx5.dtsi | |
| parent | ba4d1c074fd7e5f5d1a5b025b510fd542fc04da5 (diff) | |
| download | linux-5df50128050d01d300f28d9bca4dd89d6d24de3d.tar.xz | |
arm64: dts: sparx5: Add spi-nand devices
This patch add spi-nand DT nodes to the applicable Sparx5 boards.
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
Link: https://lore.kernel.org/r/20200824203010.2033-7-lars.povlsen@microchip.com
Diffstat (limited to 'arch/arm64/boot/dts/microchip/sparx5.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/microchip/sparx5.dtsi | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/microchip/sparx5.dtsi b/arch/arm64/boot/dts/microchip/sparx5.dtsi index b7a38557fb77..3cb01c39c3c8 100644 --- a/arch/arm64/boot/dts/microchip/sparx5.dtsi +++ b/arch/arm64/boot/dts/microchip/sparx5.dtsi @@ -206,6 +206,26 @@ interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; #interrupt-cells = <2>; + cs1_pins: cs1-pins { + pins = "GPIO_16"; + function = "si"; + }; + + cs2_pins: cs2-pins { + pins = "GPIO_17"; + function = "si"; + }; + + cs3_pins: cs3-pins { + pins = "GPIO_18"; + function = "si"; + }; + + si2_pins: si2-pins { + pins = "GPIO_39", "GPIO_40", "GPIO_41"; + function = "si2"; + }; + uart_pins: uart-pins { pins = "GPIO_10", "GPIO_11"; function = "uart"; |