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authorFabien Parent <fparent@baylibre.com>2020-10-18 22:42:25 +0300
committerMatthias Brugger <matthias.bgg@gmail.com>2020-10-26 12:49:41 +0300
commite55c56df43dd11de4a6c08e3ea52ca45b51c8800 (patch)
tree08d575bed05aaaaad114c0eeffe35d40437abd68 /arch/arm64/boot/dts/mediatek
parent4c7a6260775d596bb4ded0c0e2b3d317e0b37014 (diff)
downloadlinux-e55c56df43dd11de4a6c08e3ea52ca45b51c8800.tar.xz
arm64: dts: mediatek: mt8183: fix gce incorrect mbox-cells value
The binding documentation says: - #mbox-cells: Should be 2. <&phandle channel priority> phandle: Label name of a gce node. channel: Channel of mailbox. Be equal to the thread id of GCE. priority: Priority of GCE thread. Fix the value of #mbox-cells. Fixes: d3c306e31bc7 ("arm64: dts: add gce node for mt8183") Signed-off-by: Fabien Parent <fparent@baylibre.com> Link: https://lore.kernel.org/r/20201018194225.3361182-1-fparent@baylibre.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Diffstat (limited to 'arch/arm64/boot/dts/mediatek')
-rw-r--r--arch/arm64/boot/dts/mediatek/mt8183.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index 9cfd961c45eb..08a914d3a643 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -363,7 +363,7 @@
compatible = "mediatek,mt8183-gce";
reg = <0 0x10238000 0 0x4000>;
interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_LOW>;
- #mbox-cells = <3>;
+ #mbox-cells = <2>;
clocks = <&infracfg CLK_INFRA_GCE>;
clock-names = "gce";
};