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authorThomas Petazzoni <thomas.petazzoni@free-electrons.com>2016-08-05 17:55:21 +0300
committerGregory CLEMENT <gregory.clement@free-electrons.com>2016-08-26 11:57:20 +0300
commit98e45c1675a018e1121c1244985cf80b790fb6c4 (patch)
tree4d95b3f0b82cabdd95167371e8bb7860e167c7db /arch/arm64/boot/dts/marvell
parentec03445c9ee282eef12b72cdb029348f80daad58 (diff)
downloadlinux-98e45c1675a018e1121c1244985cf80b790fb6c4.tar.xz
arm64: dts: marvell: describe the PIC and PMU on Armada 7K/8K
This commit adds the necessary Device Tree description for the PIC interrupt controller and the PMU available in the Marvell Armada 7K and Armada 8K SoCs. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Diffstat (limited to 'arch/arm64/boot/dts/marvell')
-rw-r--r--arch/arm64/boot/dts/marvell/armada-ap806.dtsi14
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
index eab1a42fb934..e70b9961115d 100644
--- a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
@@ -128,6 +128,12 @@
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
};
+ pmu {
+ compatible = "arm,cortex-a72-pmu";
+ interrupt-parent = <&pic>;
+ interrupts = <17>;
+ };
+
odmi: odmi@300000 {
compatible = "marvell,odmi-controller";
interrupt-controller;
@@ -140,6 +146,14 @@
marvell,spi-base = <128>, <136>, <144>, <152>;
};
+ pic: interrupt-controller@3f0100 {
+ compatible = "marvell,armada-8k-pic";
+ reg = <0x3f0100 0x10>;
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ interrupts = <GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
xor@400000 {
compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
reg = <0x400000 0x1000>,