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| author | Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | 2018-01-02 17:55:58 +0300 |
|---|---|---|
| committer | Gregory CLEMENT <gregory.clement@free-electrons.com> | 2018-01-05 19:02:43 +0300 |
| commit | 91f1be92eb511c549b1e2e723bdeb13e7cb33a99 (patch) | |
| tree | ace45e65312f587c162963e645dfa3275653dbff /arch/arm64/boot/dts/marvell/armada-8040.dtsi | |
| parent | 72a3713fadfd5ff41010c7089c53b02aa19e57cd (diff) | |
| download | linux-91f1be92eb511c549b1e2e723bdeb13e7cb33a99.tar.xz | |
arm64: dts: marvell: replace cpm by cp0, cps by cp1
In preparation for the introduction of more than 2 CPs in upcoming
SoCs, it makes sense to move away from the "CP master" (cpm) and "CP
slave" (cps) naming, and use instead cp0/cp1.
This commit is the result of:
sed 's%cpm%cp0g%' arch/arm64/boot/dts/marvell/*
sed 's%cps%cp1g%' arch/arm64/boot/dts/marvell/*
So it is a purely mechaninal change.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Suggested-by: Hanna Hawa <hannah@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Diffstat (limited to 'arch/arm64/boot/dts/marvell/armada-8040.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/marvell/armada-8040.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/marvell/armada-8040.dtsi b/arch/arm64/boot/dts/marvell/armada-8040.dtsi index 60fe84f5cbcc..83d2b40e5981 100644 --- a/arch/arm64/boot/dts/marvell/armada-8040.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-8040.dtsi @@ -59,6 +59,6 @@ * disable it. However, the RTC clock in CP slave is connected to the * oscillator so this one is let enabled. */ -&cpm_rtc { +&cp0_rtc { status = "disabled"; }; |