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author | Anson Huang <Anson.Huang@nxp.com> | 2019-08-18 09:32:19 +0300 |
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committer | Shawn Guo <shawnguo@kernel.org> | 2019-08-19 17:15:34 +0300 |
commit | 089a6adeb0fbea7b8628986fdd7b8528554d7c71 (patch) | |
tree | 769fd871564b3cd0556f10dc7bafdd813a6d45cb /arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts | |
parent | 13cb15e0a6f5a51d14115525708f9deb30d975ad (diff) | |
download | linux-089a6adeb0fbea7b8628986fdd7b8528554d7c71.tar.xz |
arm64: dts: imx8mn-ddr4-evk: Add i2c1 support
Enable i2c1 on i.MX8MN DDR4 EVK board.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts')
-rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts b/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts index 9b2c1727a862..5fce5b1beeeb 100644 --- a/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts @@ -50,6 +50,13 @@ >; }; + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX8MN_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3 + MX8MN_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3 + >; + }; + pinctrl_reg_usdhc2_vmmc: regusdhc2vmmc { fsl,pins = < MX8MN_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41 @@ -182,6 +189,13 @@ }; }; +&i2c1 { + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + status = "okay"; +}; + &snvs_pwrkey { status = "okay"; }; |