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authorAlexandre Ghiti <alexghiti@rivosinc.com>2023-07-25 16:22:46 +0300
committerPalmer Dabbelt <palmer@rivosinc.com>2023-08-10 18:54:29 +0300
commit7e3811521dc3934e2ecae8458676fc4a1f62bf9f (patch)
treea804c8230adc9cd8b1dbad23a1973b1db7ee4467 /arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi
parentd566bea4a638ff0ae824df804bc08818bace41a5 (diff)
downloadlinux-7e3811521dc3934e2ecae8458676fc4a1f62bf9f.tar.xz
riscv: Implement flush_cache_vmap()
The RISC-V kernel needs a sfence.vma after a page table modification: we used to rely on the vmalloc fault handling to emit an sfence.vma, but commit 7d3332be011e ("riscv: mm: Pre-allocate PGD entries for vmalloc/modules area") got rid of this path for 64-bit kernels, so now we need to explicitly emit a sfence.vma in flush_cache_vmap(). Note that we don't need to implement flush_cache_vunmap() as the generic code should emit a flush tlb after unmapping a vmalloc region. Fixes: 7d3332be011e ("riscv: mm: Pre-allocate PGD entries for vmalloc/modules area") Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com> Link: https://lore.kernel.org/r/20230725132246.817726-1-alexghiti@rivosinc.com Cc: stable@vger.kernel.org Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi')
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