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author | Kuldeep Singh <singh.kuldeep87k@gmail.com> | 2022-04-02 22:08:55 +0300 |
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committer | Shawn Guo <shawnguo@kernel.org> | 2022-04-11 04:39:14 +0300 |
commit | 7cbeeb0553615d4c8beaab36170f26b138f718ee (patch) | |
tree | 5c379f93693a751ee8a348d0dc1dd1d543679d30 /arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | |
parent | 73d901d6dc6158e3a7474b184f319260a2ebc921 (diff) | |
download | linux-7cbeeb0553615d4c8beaab36170f26b138f718ee.tar.xz |
arm64: dts: lx2160a: Update can node property
fsl,clk-source property is of type uint8 and need to be defined as
"/bits/ 8 <0>". Simply setting value to 0 raise warning:
can@2180000: fsl,clk-source:0: [0, 0, 0, 0] is too long
Signed-off-by: Kuldeep Singh <singh.kuldeep87k@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi index c5daa15b020d..82bd8c0f318b 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi @@ -909,7 +909,7 @@ QORIQ_CLK_PLL_DIV(8)>, <&clockgen QORIQ_CLK_SYSCLK 0>; clock-names = "ipg", "per"; - fsl,clk-source = <0>; + fsl,clk-source = /bits/ 8 <0>; status = "disabled"; }; @@ -921,7 +921,7 @@ QORIQ_CLK_PLL_DIV(8)>, <&clockgen QORIQ_CLK_SYSCLK 0>; clock-names = "ipg", "per"; - fsl,clk-source = <0>; + fsl,clk-source = /bits/ 8 <0>; status = "disabled"; }; |