summaryrefslogtreecommitdiff
path: root/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
diff options
context:
space:
mode:
authorMarc Zyngier <marc.zyngier@arm.com>2016-08-01 12:54:16 +0300
committerArnd Bergmann <arnd@arndb.de>2016-09-14 23:47:22 +0300
commitf2a89d3b2b85b90b05453872aaabfdb412a21a03 (patch)
tree5721114a29d28a3bcb8544f45bf9ea30c0a9afb7 /arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
parent29b4817d4018df78086157ea3a55c1d9424a7cfc (diff)
downloadlinux-f2a89d3b2b85b90b05453872aaabfdb412a21a03.tar.xz
arm64: dts: Fix broken architected timer interrupt trigger
The ARM architected timer specification mandates that the interrupt associated with each timer is level triggered (which corresponds to the "counter >= comparator" condition). A number of DTs are being remarkably creative, declaring the interrupt to be edge triggered. A quick look at the TRM for the corresponding ARM CPUs clearly shows that this is wrong, and I've corrected those. For non-ARM designs (and in the absence of a publicly available TRM), I've made them active low as well, which can't be completely wrong as the GIC cannot disinguish between level low and level high. The respective maintainers are of course welcome to prove me wrong. While I was at it, I took the liberty to fix a couple of related issue, such as some spurious affinity bits on ThunderX, and their complete absence on ls1043a (both of which seem to be related to copy-pasting from other DTs). Acked-by: Duc Dang <dhdang@apm.com> Acked-by: Carlo Caione <carlo@endlessm.com> Acked-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi')
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
index 21023a388c29..e3b6034ea5d9 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
@@ -191,10 +191,10 @@
timer {
compatible = "arm,armv8-timer";
- interrupts = <1 13 0x8>, /* Physical Secure PPI, active-low */
- <1 14 0x8>, /* Physical Non-Secure PPI, active-low */
- <1 11 0x8>, /* Virtual PPI, active-low */
- <1 10 0x8>; /* Hypervisor PPI, active-low */
+ interrupts = <1 13 4>, /* Physical Secure PPI, active-low */
+ <1 14 4>, /* Physical Non-Secure PPI, active-low */
+ <1 11 4>, /* Virtual PPI, active-low */
+ <1 10 4>; /* Hypervisor PPI, active-low */
};
pmu {