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| author | Pierre Gondois <pierre.gondois@arm.com> | 2022-11-07 18:57:01 +0300 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2022-11-15 03:29:35 +0300 |
| commit | 3b450831e5f1af09c6b0767b20f607943a681ffb (patch) | |
| tree | 5b5b22f0787ecd263111cd5dffd2c3b8c4cb2b1f /arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | |
| parent | 77a1a1826f7d5072d78c5135877c8733468f5ceb (diff) | |
| download | linux-3b450831e5f1af09c6b0767b20f607943a681ffb.tar.xz | |
arm64: dts: Update cache properties for freescale
The DeviceTree Specification v0.3 specifies that the cache node
'compatible' and 'cache-level' properties are 'required'. Cf.
s3.8 Multi-level and Shared Cache Nodes
The 'cache-unified' property should be present if one of the
properties for unified cache is present ('cache-size', ...).
Update the Device Trees accordingly.
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Chester Lin <clin@suse.com>
Acked-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi index 3d9e29824bb2..a01e3cfec77f 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi @@ -79,6 +79,7 @@ l2: l2-cache { compatible = "cache"; + cache-level = <2>; }; }; |