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author | Andrzej Hajda <a.hajda@samsung.com> | 2019-03-20 16:07:01 +0300 |
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committer | Krzysztof Kozlowski <krzk@kernel.org> | 2019-03-20 21:29:57 +0300 |
commit | 7698ffaf4198640ab5a9fea88eb804947ccd9f5b (patch) | |
tree | 0169b9c47f6e21ddd6abf171f4e08ee3672da2a4 /arch/arm64/boot/dts/exynos/exynos5433-tm2.dts | |
parent | 9e98c678c2d6ae3a17cb2de55d17f69dddaa231b (diff) | |
download | linux-7698ffaf4198640ab5a9fea88eb804947ccd9f5b.tar.xz |
arm64: dts: exynos: configure GSCALER related clocks on TM2
GSCALER should be feed with clock at certain rates. Configure it on
Exynos5433 based TM2 board.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/exynos/exynos5433-tm2.dts')
-rw-r--r-- | arch/arm64/boot/dts/exynos/exynos5433-tm2.dts | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts index 3d7e0a782243..dda5d2746a74 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts +++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2.dts @@ -33,7 +33,8 @@ <&cmu_disp CLK_MOUT_DISP_PLL>, <&cmu_mif CLK_MOUT_SCLK_DECON_TV_ECLK_A>, <&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK_USER>, - <&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK>; + <&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK>, + <&cmu_disp CLK_MOUT_SCLK_DSD_USER>; assigned-clock-parents = <0>, <0>, <&cmu_mif CLK_ACLK_DISP_333>, <&cmu_mif CLK_SCLK_DSIM0_DISP>, @@ -45,7 +46,8 @@ <&cmu_disp CLK_FOUT_DISP_PLL>, <&cmu_mif CLK_MOUT_BUS_PLL_DIV2>, <&cmu_mif CLK_SCLK_DECON_TV_ECLK_DISP>, - <&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK_USER>; + <&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK_USER>, + <&cmu_mif CLK_SCLK_DSD_DISP>; assigned-clock-rates = <250000000>, <400000000>; }; |