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authorLinus Torvalds <torvalds@linux-foundation.org>2018-08-24 00:02:22 +0300
committerLinus Torvalds <torvalds@linux-foundation.org>2018-08-24 00:02:22 +0300
commit2f34a64aeac4d87e8ed8275d9f1230e18a50079c (patch)
tree33a59830cdbfb749af24cde9a241806edba868fd /arch/arm64/boot/dts/broadcom/stingray/stingray-pcie.dtsi
parentee090756962c58b32af62b768ac7c58cc53af700 (diff)
parentafd3e3dad6761ddf08119afe121bfbe096c0844b (diff)
downloadlinux-2f34a64aeac4d87e8ed8275d9f1230e18a50079c.tar.xz
Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM device-tree updates from Olof Johansson: "Business as usual -- the bulk of our changes are to devicetree files with new hardware support, new SoCs and platforms, and new board types. New SoCs/platforms: - Raspberry Pi Compute Module (CM1) and IO board - i.MX6SSL from NXP - Renesas RZ/N1D SoC (R9A06G032), Dual Cortex-A7 with Ethernet, CAN and PLC interfaces - TI AM654 SoC, Quad Cortex-A53, safety subsystem with Cortex-R5 controllers, communication and PRU subsystem and lots of other interfaces (PCIe, USB3, etc). New boards and systems: - Several Atmel at91-based boards from Laird - Marvell Armada388-based Helios4 board from SolidRun - Samsung Aires-based phones (s5pv210) - Allwinner A64-based Pinebook laptop In addition to the above, there's the usual amount of new devices described on existing platforms, fixes and tweaks and new minor variants of boards/platforms" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (478 commits) arm64: dts: sdm845: Add tsens nodes arm64: dts: msm8996: thermal: Initialise via DT and add second controller arm64: dts: sprd: Add one suspend timer arm64: dts: sprd: Add SC27XX ADC device arm64: dts: sprd: Add SC27XX eFuse device arm64: dts: sprd: Add SC27XX vibrator device arm64: dts: sprd: Add SC27XX breathing light controller device arm64: dts: meson-axg: add spdif-dit codec arm64: dts: meson-axg: add lineout codec arm64: dts: meson-axg: add linein codec arm64: dts: meson-axg: add tdm interfaces arm64: dts: meson-axg: add tdmout formatters arm64: dts: meson-axg: add tdmin formatters arm64: dts: meson-axg: add spdifout arm64: dts: rockchip: add led support for Firefly-RK3399 arm64: dts: rockchip: remove deprecated Type-C PHY properties on rk3399 arm64: dts: rockchip: add power button support for Firefly-RK3399 ARM: dts: aspeed: Add coprocessor interrupt controller arm64: dts: meson-axg: add audio arb reset controller arm64: dts: meson-axg: add usb power regulator ...
Diffstat (limited to 'arch/arm64/boot/dts/broadcom/stingray/stingray-pcie.dtsi')
-rw-r--r--arch/arm64/boot/dts/broadcom/stingray/stingray-pcie.dtsi54
1 files changed, 54 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/broadcom/stingray/stingray-pcie.dtsi b/arch/arm64/boot/dts/broadcom/stingray/stingray-pcie.dtsi
new file mode 100644
index 000000000000..33a472ab17e8
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/stingray/stingray-pcie.dtsi
@@ -0,0 +1,54 @@
+// SPDX-License-Identifier: (GPL-2.0 or BSD-3-Clause)
+/*
+ *Copyright(c) 2018 Broadcom
+ */
+
+pcie8: pcie@60400000 {
+ compatible = "brcm,iproc-pcie-paxc-v2";
+ reg = <0 0x60400000 0 0x1000>;
+ linux,pci-domain = <8>;
+
+ bus-range = <0x0 0x1>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ ranges = <0x83000000 0 0x10000000 0 0x10000000 0 0x20000000>;
+
+ dma-coherent;
+
+ msi-map = <0x100 &gic_its 0x2000 0x1>, /* PF0 */
+ <0x108 &gic_its 0x2040 0x8>, /* PF0-VF0-7 */
+ <0x101 &gic_its 0x2080 0x1>, /* PF1 */
+ <0x110 &gic_its 0x20c8 0x8>, /* PF1-VF8-15 */
+ <0x102 &gic_its 0x2100 0x1>, /* PF2 */
+ <0x118 &gic_its 0x2150 0x8>, /* PF2-VF16-23 */
+ <0x103 &gic_its 0x2180 0x1>, /* PF3 */
+ <0x120 &gic_its 0x21d8 0x8>, /* PF3-VF24-31 */
+ <0x104 &gic_its 0x2200 0x1>, /* PF4 */
+ <0x128 &gic_its 0x2260 0x8>, /* PF4-VF32-39 */
+ <0x105 &gic_its 0x2280 0x1>, /* PF5 */
+ <0x130 &gic_its 0x22e8 0x8>, /* PF5-VF40-47 */
+ <0x106 &gic_its 0x2300 0x1>, /* PF6 */
+ <0x138 &gic_its 0x2370 0x8>, /* PF6-VF48-55 */
+ <0x107 &gic_its 0x2380 0x1>, /* PF7 */
+ <0x140 &gic_its 0x23f8 0x8>; /* PF7-VF56-63 */
+
+ phys = <&pcie_phy 8>;
+ phy-names = "pcie-phy";
+};
+
+pcie-ss {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x40000000 0x800>;
+
+ pcie_phy: phy@0 {
+ compatible = "brcm,sr-pcie-phy";
+ reg = <0x0 0x200>;
+ brcm,sr-cdru = <&cdru>;
+ brcm,sr-mhb = <&mhb>;
+ #phy-cells = <1>;
+ };
+};