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authorManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>2020-01-14 07:03:10 +0300
committerOlof Johansson <olof@lixom.net>2020-01-17 02:48:02 +0300
commite1cd7b804687ae15469ef2b6a19f9dd33046cc61 (patch)
tree7b41183198e5c7fde67741f948cf7a449fed600e /arch/arm64/boot/dts/bitmain
parenta0be47376f1d12c2c9cef8a3857ccf6fabc6c3cb (diff)
downloadlinux-e1cd7b804687ae15469ef2b6a19f9dd33046cc61.tar.xz
arm64: dts: bitmain: Add clock controller support for BM1880 SoC
Add clock controller support for Bitmain BM1880 SoC. Link: https://lore.kernel.org/r/20200114040311.6599-2-manivannan.sadhasivam@linaro.org Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm64/boot/dts/bitmain')
-rw-r--r--arch/arm64/boot/dts/bitmain/bm1880.dtsi16
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/bitmain/bm1880.dtsi b/arch/arm64/boot/dts/bitmain/bm1880.dtsi
index d65453f99a99..8471662413da 100644
--- a/arch/arm64/boot/dts/bitmain/bm1880.dtsi
+++ b/arch/arm64/boot/dts/bitmain/bm1880.dtsi
@@ -4,6 +4,7 @@
* Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
*/
+#include <dt-bindings/clock/bm1880-clock.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/reset/bitmain,bm1880-reset.h>
@@ -66,6 +67,12 @@
<GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
};
+ osc: osc {
+ compatible = "fixed-clock";
+ clock-frequency = <25000000>;
+ #clock-cells = <0>;
+ };
+
soc {
compatible = "simple-bus";
#address-cells = <2>;
@@ -94,6 +101,15 @@
reg = <0x400 0x120>;
};
+ clk: clock-controller@e8 {
+ compatible = "bitmain,bm1880-clk";
+ reg = <0xe8 0x0c>, <0x800 0xb0>;
+ reg-names = "pll", "sys";
+ clocks = <&osc>;
+ clock-names = "osc";
+ #clock-cells = <1>;
+ };
+
rst: reset-controller@c00 {
compatible = "bitmain,bm1880-reset";
reg = <0xc00 0x8>;