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| author | Tai Nguyen <ttnguyen@apm.com> | 2016-07-15 20:38:05 +0300 |
|---|---|---|
| committer | Duc Dang <dhdang@apm.com> | 2016-09-15 21:13:32 +0300 |
| commit | 0317cd525d6bf70d6b222fad7f19bfc01368819d (patch) | |
| tree | 8fde5bb2df7823bd24a05d25bc7d3362c49e3bb7 /arch/arm64/boot/dts/apm | |
| parent | 29b4817d4018df78086157ea3a55c1d9424a7cfc (diff) | |
| download | linux-0317cd525d6bf70d6b222fad7f19bfc01368819d.tar.xz | |
arm64: dts: apm: Add APM X-Gene SoC PMU DTS entries
This patch adds APM X-Gene SoC PMU DTS entries.
Signed-off-by: Tai Nguyen <ttnguyen@apm.com>
Diffstat (limited to 'arch/arm64/boot/dts/apm')
| -rw-r--r-- | arch/arm64/boot/dts/apm/apm-storm.dtsi | 58 |
1 files changed, 58 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/apm/apm-storm.dtsi b/arch/arm64/boot/dts/apm/apm-storm.dtsi index f1c2c713f9b0..07659cb05b55 100644 --- a/arch/arm64/boot/dts/apm/apm-storm.dtsi +++ b/arch/arm64/boot/dts/apm/apm-storm.dtsi @@ -553,6 +553,64 @@ }; }; + pmu: pmu@78810000 { + compatible = "apm,xgene-pmu-v2"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + regmap-csw = <&csw>; + regmap-mcba = <&mcba>; + regmap-mcbb = <&mcbb>; + reg = <0x0 0x78810000 0x0 0x1000>; + interrupts = <0x0 0x22 0x4>; + + pmul3c@7e610000 { + compatible = "apm,xgene-pmu-l3c"; + reg = <0x0 0x7e610000 0x0 0x1000>; + }; + + pmuiob@7e940000 { + compatible = "apm,xgene-pmu-iob"; + reg = <0x0 0x7e940000 0x0 0x1000>; + }; + + pmucmcb@7e710000 { + compatible = "apm,xgene-pmu-mcb"; + reg = <0x0 0x7e710000 0x0 0x1000>; + enable-bit-index = <0>; + }; + + pmucmcb@7e730000 { + compatible = "apm,xgene-pmu-mcb"; + reg = <0x0 0x7e730000 0x0 0x1000>; + enable-bit-index = <1>; + }; + + pmucmc@7e810000 { + compatible = "apm,xgene-pmu-mc"; + reg = <0x0 0x7e810000 0x0 0x1000>; + enable-bit-index = <0>; + }; + + pmucmc@7e850000 { + compatible = "apm,xgene-pmu-mc"; + reg = <0x0 0x7e850000 0x0 0x1000>; + enable-bit-index = <1>; + }; + + pmucmc@7e890000 { + compatible = "apm,xgene-pmu-mc"; + reg = <0x0 0x7e890000 0x0 0x1000>; + enable-bit-index = <2>; + }; + + pmucmc@7e8d0000 { + compatible = "apm,xgene-pmu-mc"; + reg = <0x0 0x7e8d0000 0x0 0x1000>; + enable-bit-index = <3>; + }; + }; + pcie0: pcie@1f2b0000 { status = "disabled"; device_type = "pci"; |