diff options
| author | Neil Armstrong <narmstrong@baylibre.com> | 2017-03-22 13:18:55 +0300 |
|---|---|---|
| committer | Kevin Hilman <khilman@baylibre.com> | 2017-03-28 17:48:27 +0300 |
| commit | 57ef579878c3a9a168ce071a78982216338ba500 (patch) | |
| tree | 966d31681fb4b18b4db048263bda7959e68c540a /arch/arm64/boot/dts/amlogic/meson-gxl-mali.dtsi | |
| parent | ca02e3f9b1853ff82565a3262146a710f5af7ebb (diff) | |
| download | linux-57ef579878c3a9a168ce071a78982216338ba500.tar.xz | |
ARM64: dts: meson-gx: Add Mali nodes for GXBB and GXL
The same Mali-450 MP3 GPU is present in the GXBB and GXL SoCs.
The node is simply added in the meson-gxbb.dtsi file.
For GXL, since a lot is shared with the GXM that has a Mali-T820 IP, this
patch adds a new meson-gxl-mali.dtsi and is included in the SoC specific
dtsi files.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
[khilman: s/MALI/Mali in changelog]
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Diffstat (limited to 'arch/arm64/boot/dts/amlogic/meson-gxl-mali.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/amlogic/meson-gxl-mali.dtsi | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-mali.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl-mali.dtsi new file mode 100644 index 000000000000..f06cc234693b --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/meson-gxl-mali.dtsi @@ -0,0 +1,43 @@ +/* + * Copyright (c) 2017 BayLibre SAS + * Author: Neil Armstrong <narmstrong@baylibre.com> + * + * SPDX-License-Identifier: (GPL-2.0+ OR MIT) + */ + +&apb { + mali: gpu@c0000 { + compatible = "amlogic,meson-gxbb-mali", "arm,mali-450"; + reg = <0x0 0xc0000 0x0 0x40000>; + interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "gp", "gpmmu", "pp", "pmu", + "pp0", "ppmmu0", "pp1", "ppmmu1", + "pp2", "ppmmu2"; + clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>; + clock-names = "bus", "core"; + + /* + * Mali clocking is provided by two identical clock paths + * MALI_0 and MALI_1 muxed to a single clock by a glitch + * free mux to safely change frequency while running. + */ + assigned-clocks = <&clkc CLKID_MALI_0_SEL>, + <&clkc CLKID_MALI_0>, + <&clkc CLKID_MALI>; /* Glitch free mux */ + assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>, + <0>, /* Do Nothing */ + <&clkc CLKID_MALI_0>; + assigned-clock-rates = <0>, /* Do Nothing */ + <666666666>, + <0>; /* Do Nothing */ + }; +}; |