diff options
| author | Thor Thayer <thor.thayer@linux.intel.com> | 2018-05-16 01:26:27 +0300 |
|---|---|---|
| committer | Dinh Nguyen <dinguyen@kernel.org> | 2018-07-02 16:44:15 +0300 |
| commit | 0cb140d07fc75fb40dc402ba7e6e8c3c3a6f9d71 (patch) | |
| tree | dfb60a3a20f27c95e83b832496a9c00c5f8d3209 /arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | |
| parent | 021c91791a5e7e85c567452f1be3e4c2c6cb6063 (diff) | |
| download | linux-0cb140d07fc75fb40dc402ba7e6e8c3c3a6f9d71.tar.xz | |
arm64: dts: stratix10: Add QSPI support for Stratix10
Add qspi_clock
The qspi_clk frequency is updated by U-Boot before starting Linux.
Add QSPI interface node.
Add QSPI flash memory child node.
Setup the QSPI memory in 2 partitions.
Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi index 67dac595dc72..47fa4b450324 100644 --- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi @@ -119,6 +119,12 @@ #clock-cells = <0>; compatible = "fixed-clock"; }; + + qspi_clk: qspi-clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <200000000>; + }; }; gmac0: ethernet@ff800000 { @@ -464,5 +470,20 @@ interrupts = <16 4>, <48 4>; }; }; + + qspi: spi@ff8d2000 { + compatible = "cdns,qspi-nor"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xff8d2000 0x100>, + <0xff900000 0x100000>; + interrupts = <0 3 4>; + cdns,fifo-depth = <128>; + cdns,fifo-width = <4>; + cdns,trigger-address = <0x00000000>; + clocks = <&qspi_clk>; + + status = "disabled"; + }; }; }; |