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authorWill Deacon <will.deacon@arm.com>2018-12-10 21:53:03 +0300
committerWill Deacon <will.deacon@arm.com>2018-12-10 21:53:52 +0300
commitbc84a2d106beab6000223b569c3bcb9ebf49d9ec (patch)
tree41d5fee0c983a8820478c0c7e812b76be43ed07c /arch/arm64/Kconfig
parentf357b3a7e17af7736d67d8267edc1ed3d1dd9391 (diff)
parenta457b0f7f50d4d189f0d009617885e4341133e8e (diff)
downloadlinux-bc84a2d106beab6000223b569c3bcb9ebf49d9ec.tar.xz
Merge branch 'kvm/cortex-a76-erratum-1165522' into aarch64/for-next/core
Pull in KVM workaround for A76 erratum #116522. Conflicts: arch/arm64/include/asm/cpucaps.h
Diffstat (limited to 'arch/arm64/Kconfig')
-rw-r--r--arch/arm64/Kconfig12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 905ce1653e82..090f008835f5 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -504,6 +504,18 @@ config ARM64_ERRATUM_1188873
If unsure, say Y.
+config ARM64_ERRATUM_1165522
+ bool "Cortex-A76: Speculative AT instruction using out-of-context translation regime could cause subsequent request to generate an incorrect translation"
+ default y
+ help
+ This option adds work arounds for ARM Cortex-A76 erratum 1165522
+
+ Affected Cortex-A76 cores (r0p0, r1p0, r2p0) could end-up with
+ corrupted TLBs by speculating an AT instruction during a guest
+ context switch.
+
+ If unsure, say Y.
+
config CAVIUM_ERRATUM_22375
bool "Cavium erratum 22375, 24313"
default y