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| author | Marc Zyngier <marc.zyngier@arm.com> | 2018-12-06 20:31:26 +0300 |
|---|---|---|
| committer | Will Deacon <will.deacon@arm.com> | 2018-12-10 15:21:06 +0300 |
| commit | a457b0f7f50d4d189f0d009617885e4341133e8e (patch) | |
| tree | 24780ce20bacbe0af478ba508ca22a153b0837af /arch/arm64/Kconfig | |
| parent | eb036ad2ddf008309ea25e34470898c8cd122f6b (diff) | |
| download | linux-a457b0f7f50d4d189f0d009617885e4341133e8e.tar.xz | |
arm64: Add configuration/documentation for Cortex-A76 erratum 1165522
Now that the infrastructure to handle erratum 1165522 is in place,
let's make it a selectable option and add the required documentation.
Reviewed-by: James Morse <james.morse@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm64/Kconfig')
| -rw-r--r-- | arch/arm64/Kconfig | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 787d7850e064..a68bc6cc2167 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -497,6 +497,18 @@ config ARM64_ERRATUM_1188873 If unsure, say Y. +config ARM64_ERRATUM_1165522 + bool "Cortex-A76: Speculative AT instruction using out-of-context translation regime could cause subsequent request to generate an incorrect translation" + default y + help + This option adds work arounds for ARM Cortex-A76 erratum 1165522 + + Affected Cortex-A76 cores (r0p0, r1p0, r2p0) could end-up with + corrupted TLBs by speculating an AT instruction during a guest + context switch. + + If unsure, say Y. + config CAVIUM_ERRATUM_22375 bool "Cavium erratum 22375, 24313" default y |