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authorIngo Molnar <mingo@elte.hu>2009-06-17 14:52:15 +0400
committerIngo Molnar <mingo@elte.hu>2009-06-17 14:56:49 +0400
commiteadb8a091b27a840de7450f84ecff5ef13476424 (patch)
tree58c3782d40def63baa8167f3d31e3048cb4c7660 /arch/arm/plat-stmp3xxx/include/mach/system.h
parent73874005cd8800440be4299bd095387fff4b90ac (diff)
parent65795efbd380a832ae508b04dba8f8e53f0b84d9 (diff)
downloadlinux-eadb8a091b27a840de7450f84ecff5ef13476424.tar.xz
Merge branch 'linus' into tracing/hw-breakpoints
Conflicts: arch/x86/Kconfig arch/x86/kernel/traps.c arch/x86/power/cpu.c arch/x86/power/cpu_32.c kernel/Makefile Semantic conflict: arch/x86/kernel/hw_breakpoint.c Merge reason: Resolve the conflicts, move from put_cpu_no_sched() to put_cpu() in arch/x86/kernel/hw_breakpoint.c. Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/arm/plat-stmp3xxx/include/mach/system.h')
-rw-r--r--arch/arm/plat-stmp3xxx/include/mach/system.h49
1 files changed, 49 insertions, 0 deletions
diff --git a/arch/arm/plat-stmp3xxx/include/mach/system.h b/arch/arm/plat-stmp3xxx/include/mach/system.h
new file mode 100644
index 000000000000..28a988889319
--- /dev/null
+++ b/arch/arm/plat-stmp3xxx/include/mach/system.h
@@ -0,0 +1,49 @@
+/*
+ * Copyright (C) 2005 Sigmatel Inc
+ *
+ * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.
+ */
+
+/*
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+#ifndef __ASM_ARCH_SYSTEM_H
+#define __ASM_ARCH_SYSTEM_H
+
+#include <asm/proc-fns.h>
+#include <mach/platform.h>
+#include <mach/regs-clkctrl.h>
+#include <mach/regs-power.h>
+
+static inline void arch_idle(void)
+{
+ /*
+ * This should do all the clock switching
+ * and wait for interrupt tricks
+ */
+
+ cpu_do_idle();
+}
+
+static inline void arch_reset(char mode, const char *cmd)
+{
+ /* Set BATTCHRG to default value */
+ __raw_writel(0x00010000, REGS_POWER_BASE + HW_POWER_CHARGE);
+
+ /* Set MINPWR to default value */
+ __raw_writel(0, REGS_POWER_BASE + HW_POWER_MINPWR);
+
+ /* Reset digital side of chip (but not power or RTC) */
+ __raw_writel(BM_CLKCTRL_RESET_DIG,
+ REGS_CLKCTRL_BASE + HW_CLKCTRL_RESET);
+
+ /* Should not return */
+}
+
+#endif