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authorBen Dooks <ben-linux@fluff.org>2010-10-01 11:34:34 +0400
committerKukjin Kim <kgene.kim@samsung.com>2010-10-23 06:49:57 +0400
commit5459148b098e3bbdc24376f1865045189a80a0af (patch)
treee303832cf0f25a91cf4ff5a05678304d1dda994c /arch/arm/plat-samsung
parentce5d3ac1f57b7a4ff28c57ebef709b8f9fd30fab (diff)
downloadlinux-5459148b098e3bbdc24376f1865045189a80a0af.tar.xz
ARM: SAMSUNG: Add s3c_gpio_cfgall_range() function
Add a function to configure a range of GPIOs function and pull in one go, mainly for the SDHCI and framebuffer helpers which tend to do this. Signed-off-by: Ben Dooks <ben-linux@fluff.org> [kgene.kim@samsung.com: Fix small comments] Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/plat-samsung')
-rw-r--r--arch/arm/plat-samsung/gpio-config.c16
-rw-r--r--arch/arm/plat-samsung/include/plat/gpio-cfg.h19
2 files changed, 35 insertions, 0 deletions
diff --git a/arch/arm/plat-samsung/gpio-config.c b/arch/arm/plat-samsung/gpio-config.c
index fa180dcc41ce..8a372110a850 100644
--- a/arch/arm/plat-samsung/gpio-config.c
+++ b/arch/arm/plat-samsung/gpio-config.c
@@ -56,6 +56,22 @@ int s3c_gpio_cfgpin_range(unsigned int start, unsigned int nr,
}
EXPORT_SYMBOL_GPL(s3c_gpio_cfgpin_range);
+int s3c_gpio_cfgall_range(unsigned int start, unsigned int nr,
+ unsigned int cfg, s3c_gpio_pull_t pull)
+{
+ int ret;
+
+ for (; nr > 0; nr--, start++) {
+ s3c_gpio_setpull(start, pull);
+ ret = s3c_gpio_cfgpin(start, cfg);
+ if (ret != 0)
+ return ret;
+ }
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(s3c_gpio_cfgall_range);
+
unsigned s3c_gpio_getcfg(unsigned int pin)
{
struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin);
diff --git a/arch/arm/plat-samsung/include/plat/gpio-cfg.h b/arch/arm/plat-samsung/include/plat/gpio-cfg.h
index 6e117dc2709b..c84defd29502 100644
--- a/arch/arm/plat-samsung/include/plat/gpio-cfg.h
+++ b/arch/arm/plat-samsung/include/plat/gpio-cfg.h
@@ -153,6 +153,25 @@ extern int s3c_gpio_setpull(unsigned int pin, s3c_gpio_pull_t pull);
*/
extern s3c_gpio_pull_t s3c_gpio_getpull(unsigned int pin);
+/* configure `all` aspects of an gpio */
+
+/**
+ * s3c_gpio_cfgall_range() - configure range of gpio functtion and pull.
+ * @start: The gpio number to start at.
+ * @nr: The number of gpio to configure from @start.
+ * @cfg: The configuration to use
+ * @pull: The pull setting to use.
+ *
+ * Run s3c_gpio_cfgpin() and s3c_gpio_setpull() over the gpio range starting
+ * @gpio and running for @size.
+ *
+ * @sa s3c_gpio_cfgpin
+ * @sa s3c_gpio_setpull
+ * @sa s3c_gpio_cfgpin_range
+ */
+extern int s3c_gpio_cfgall_range(unsigned int start, unsigned int nr,
+ unsigned int cfg, s3c_gpio_pull_t pull);
+
/* Define values for the drvstr available for each gpio pin.
*
* These values control the value of the output signal driver strength,