summaryrefslogtreecommitdiff
path: root/arch/arm/plat-samsung/include
diff options
context:
space:
mode:
authorKukjin Kim <kgene.kim@samsung.com>2011-08-24 12:25:09 +0400
committerKukjin Kim <kgene.kim@samsung.com>2011-09-16 11:38:55 +0400
commit684653842b65b98538e5d6198998e68c879bd45e (patch)
treec104c3425f8776477c29fa519eb1bfb7597b800a /arch/arm/plat-samsung/include
parent54122447bbba20e7538093189b8ad276b959e653 (diff)
downloadlinux-684653842b65b98538e5d6198998e68c879bd45e.tar.xz
ARM: EXYNOS4: Add support new EXYNOS4212 SoC
This patch adds Samsung EXYNOS4212 SoC support. The EXYNOS4212 integrates a ARM Cortex A9 multi-core. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/plat-samsung/include')
-rw-r--r--arch/arm/plat-samsung/include/plat/cpu.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/plat-samsung/include/plat/cpu.h b/arch/arm/plat-samsung/include/plat/cpu.h
index efd920ec3b75..1bbbbb420be7 100644
--- a/arch/arm/plat-samsung/include/plat/cpu.h
+++ b/arch/arm/plat-samsung/include/plat/cpu.h
@@ -39,6 +39,7 @@ extern unsigned long samsung_cpu_id;
#define S5PV210_CPU_MASK 0xFFFFF000
#define EXYNOS4210_CPU_ID 0x43210000
+#define EXYNOS4212_CPU_ID 0x43220000
#define EXYNOS4_CPU_MASK 0xFFFE0000
#define IS_SAMSUNG_CPU(name, id, mask) \
@@ -54,6 +55,7 @@ IS_SAMSUNG_CPU(s5p6450, S5P6450_CPU_ID, S5P64XX_CPU_MASK)
IS_SAMSUNG_CPU(s5pc100, S5PC100_CPU_ID, S5PC100_CPU_MASK)
IS_SAMSUNG_CPU(s5pv210, S5PV210_CPU_ID, S5PV210_CPU_MASK)
IS_SAMSUNG_CPU(exynos4210, EXYNOS4210_CPU_ID, EXYNOS4_CPU_MASK)
+IS_SAMSUNG_CPU(exynos4212, EXYNOS4212_CPU_ID, EXYNOS4_CPU_MASK)
#if defined(CONFIG_CPU_S3C2410) || defined(CONFIG_CPU_S3C2412) || \
defined(CONFIG_CPU_S3C2416) || defined(CONFIG_CPU_S3C2440) || \
@@ -100,6 +102,12 @@ IS_SAMSUNG_CPU(exynos4210, EXYNOS4210_CPU_ID, EXYNOS4_CPU_MASK)
# define soc_is_exynos4210() 0
#endif
+#if defined(CONFIG_SOC_EXYNOS4212)
+# define soc_is_exynos4212() is_samsung_exynos4212()
+#else
+# define soc_is_exynos4212() 0
+#endif
+
#define EXYNOS4210_REV_0 (0x0)
#define EXYNOS4210_REV_1_0 (0x10)
#define EXYNOS4210_REV_1_1 (0x11)