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authorGreg Kroah-Hartman <gregkh@linuxfoundation.org>2012-11-17 06:26:00 +0400
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2012-11-17 06:26:00 +0400
commit1e619a1bf9ac878e6a984e4e279ccf712a65bc23 (patch)
tree1d5cfb16f88e36dca2f57386dd4a585a63f15287 /arch/arm/plat-omap/include
parent68a81291ff6650f3ff409ebfc58ef97dfe85a2e4 (diff)
parentf4a75d2eb7b1e2206094b901be09adb31ba63681 (diff)
downloadlinux-1e619a1bf9ac878e6a984e4e279ccf712a65bc23.tar.xz
Merge 3.7-rc6 into tty-next
Diffstat (limited to 'arch/arm/plat-omap/include')
-rw-r--r--arch/arm/plat-omap/include/plat/omap_hwmod.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index b3349f7b1a2c..1db029438022 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -443,6 +443,11 @@ struct omap_hwmod_omap4_prcm {
* in order to complete the reset. Optional clocks will be disabled
* again after the reset.
* HWMOD_16BIT_REG: Module has 16bit registers
+ * HWMOD_EXT_OPT_MAIN_CLK: The only main functional clock source for
+ * this IP block comes from an off-chip source and is not always
+ * enabled. This prevents the hwmod code from being able to
+ * enable and reset the IP block early. XXX Eventually it should
+ * be possible to query the clock framework for this information.
*/
#define HWMOD_SWSUP_SIDLE (1 << 0)
#define HWMOD_SWSUP_MSTANDBY (1 << 1)
@@ -453,6 +458,7 @@ struct omap_hwmod_omap4_prcm {
#define HWMOD_NO_IDLEST (1 << 6)
#define HWMOD_CONTROL_OPT_CLKS_IN_RESET (1 << 7)
#define HWMOD_16BIT_REG (1 << 8)
+#define HWMOD_EXT_OPT_MAIN_CLK (1 << 9)
/*
* omap_hwmod._int_flags definitions