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authorPaul Walmsley <paul@pwsan.com>2010-10-08 21:40:19 +0400
committerPaul Walmsley <paul@pwsan.com>2010-10-08 21:40:19 +0400
commitcf4c87abe238ec17cd0255b4e21abd949d7f811e (patch)
treefeffd8e664e1718ab4dc0d4ba83c26fe5b8d4be3 /arch/arm/plat-omap/include/plat
parent829e5b127a33d3baa227e87636032f36cd4c05fc (diff)
downloadlinux-cf4c87abe238ec17cd0255b4e21abd949d7f811e.tar.xz
OMAP: McBSP: implement McBSP CLKR and FSR signal muxing via mach-omap2/mcbsp.c
The OMAP ASoC McBSP code implemented CLKR and FSR signal muxing via direct System Control Module writes on OMAP2+. This required the omap_ctrl_{read,write}l() functions to be exported, which is against policy: the only code that should call those functions directly is OMAP core code, not device drivers. omap_ctrl_{read,write}*() are no longer exported, so the driver no longer builds as a module. Fix the pinmuxing part of the problem by removing calls to omap_ctrl_{read,write}l() from the OMAP ASoC McBSP code and implementing signal muxing functions in arch/arm/mach-omap2/mcbsp.c. Due to the unfortunate way that McBSP support is implemented in ASoC and the OMAP tree, these symbols must be exported for use by sound/soc/omap/omap-mcbsp.c. Going forward, the McBSP device driver should be moved from arch/arm/*omap* into drivers/ or sound/soc/*, and the CPU DAI driver should be implemented as a platform_driver as many other ASoC CPU DAI drivers are. These two steps should resolve many of the layering problems, which will rapidly reappear during a McBSP hwmod/PM runtime conversion. Signed-off-by: Paul Walmsley <paul@pwsan.com> Acked-by: Jarkko Nikula <jhnikula@gmail.com> Acked-by: Peter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: Liam Girdwood <lrg@slimlogic.co.uk> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'arch/arm/plat-omap/include/plat')
-rw-r--r--arch/arm/plat-omap/include/plat/control.h2
-rw-r--r--arch/arm/plat-omap/include/plat/mcbsp.h13
2 files changed, 14 insertions, 1 deletions
diff --git a/arch/arm/plat-omap/include/plat/control.h b/arch/arm/plat-omap/include/plat/control.h
index 19c9b2a82046..54b0c3529c83 100644
--- a/arch/arm/plat-omap/include/plat/control.h
+++ b/arch/arm/plat-omap/include/plat/control.h
@@ -223,6 +223,8 @@
#define OMAP2_MMCSDIO1ADPCLKISEL (1 << 24) /* MMC1 loop back clock */
#define OMAP24XX_USBSTANDBYCTRL (1 << 15)
#define OMAP2_MCBSP2_CLKS_MASK (1 << 6)
+#define OMAP2_MCBSP1_FSR_MASK (1 << 4)
+#define OMAP2_MCBSP1_CLKR_MASK (1 << 3)
#define OMAP2_MCBSP1_CLKS_MASK (1 << 2)
/* CONTROL_DEVCONF1 bits */
diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h
index b4ff6a11a8f2..886d0e610aa7 100644
--- a/arch/arm/plat-omap/include/plat/mcbsp.h
+++ b/arch/arm/plat-omap/include/plat/mcbsp.h
@@ -312,6 +312,14 @@
#define RFSREN 0x0002
#define RSYNCERREN 0x0001
+/* CLKR signal muxing options */
+#define CLKR_SRC_CLKR 0
+#define CLKR_SRC_CLKX 1
+
+/* FSR signal muxing options */
+#define FSR_SRC_FSR 0
+#define FSR_SRC_FSX 1
+
/* we don't do multichannel for now */
struct omap_mcbsp_reg_cfg {
u16 spcr2;
@@ -501,7 +509,6 @@ int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer, unsigned int leng
int omap_mcbsp_spi_master_xmit_word_poll(unsigned int id, u32 word);
int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 * word);
-
/* SPI specific API */
void omap_mcbsp_set_spi_mode(unsigned int id, const struct omap_mcbsp_spi_cfg * spi_cfg);
@@ -510,6 +517,10 @@ int omap_mcbsp_pollread(unsigned int id, u16 * buf);
int omap_mcbsp_pollwrite(unsigned int id, u16 buf);
int omap_mcbsp_set_io_type(unsigned int id, omap_mcbsp_io_type_t io_type);
+/* McBSP signal muxing API */
+void omap2_mcbsp1_mux_clkr_src(u8 mux);
+void omap2_mcbsp1_mux_fsr_src(u8 mux);
+
#ifdef CONFIG_ARCH_OMAP3
/* Sidetone specific API */
int omap_st_set_chgain(unsigned int id, int channel, s16 chgain);