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authorUwe Kleine-König <u.kleine-koenig@pengutronix.de>2010-10-25 17:44:25 +0400
committerUwe Kleine-König <u.kleine-koenig@pengutronix.de>2010-11-17 10:58:11 +0300
commita99631489bbd1b4647b82d0822b6a3942e2dd731 (patch)
tree9af7ee56eea709ae48587ca5409e768fbf68917a /arch/arm/plat-mxc/include/mach/mxc91231.h
parentcf3a6aba2f8402d4e45f7f263a0e69f779cd1bdc (diff)
downloadlinux-a99631489bbd1b4647b82d0822b6a3942e2dd731.tar.xz
ARM: imx: change static io mapping to use a function
Now only the virtual addresses [0xf4000000, 0xf5ffffff] are used for static per-SoC mappings. The few mappings of whole chip selects are moved accordingly. The now wrong defines for virtual base addresses are removed. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Diffstat (limited to 'arch/arm/plat-mxc/include/mach/mxc91231.h')
-rw-r--r--arch/arm/plat-mxc/include/mach/mxc91231.h22
1 files changed, 2 insertions, 20 deletions
diff --git a/arch/arm/plat-mxc/include/mach/mxc91231.h b/arch/arm/plat-mxc/include/mach/mxc91231.h
index 49e5e25000fc..765190fe6332 100644
--- a/arch/arm/plat-mxc/include/mach/mxc91231.h
+++ b/arch/arm/plat-mxc/include/mach/mxc91231.h
@@ -21,14 +21,12 @@
* L2CC
*/
#define MXC91231_L2CC_BASE_ADDR 0x30000000
-#define MXC91231_L2CC_BASE_ADDR_VIRT 0xF9000000
#define MXC91231_L2CC_SIZE SZ_64K
/*
* AIPS 1
*/
#define MXC91231_AIPS1_BASE_ADDR 0x43F00000
-#define MXC91231_AIPS1_BASE_ADDR_VIRT 0xFC000000
#define MXC91231_AIPS1_SIZE SZ_1M
#define MXC91231_AIPS1_CTRL_BASE_ADDR MXC91231_AIPS1_BASE_ADDR
@@ -53,7 +51,6 @@
* AIPS 2
*/
#define MXC91231_AIPS2_BASE_ADDR 0x53F00000
-#define MXC91231_AIPS2_BASE_ADDR_VIRT 0xFC100000
#define MXC91231_AIPS2_SIZE SZ_1M
#define MXC91231_GEMK_BASE_ADDR (MXC91231_AIPS2_BASE_ADDR + 0x8C000)
@@ -79,7 +76,6 @@
* SPBA global module 0
*/
#define MXC91231_SPBA0_BASE_ADDR 0x50000000
-#define MXC91231_SPBA0_BASE_ADDR_VIRT 0xFC200000
#define MXC91231_SPBA0_SIZE SZ_1M
#define MXC91231_MMC_SDHC1_BASE_ADDR (MXC91231_SPBA0_BASE_ADDR + 0x04000)
@@ -109,7 +105,6 @@
* SPBA global module 1
*/
#define MXC91231_SPBA1_BASE_ADDR 0x52000000
-#define MXC91231_SPBA1_BASE_ADDR_VIRT 0xFC300000
#define MXC91231_SPBA1_SIZE SZ_1M
#define MXC91231_MQSPI_BASE_ADDR (MXC91231_SPBA1_BASE_ADDR + 0x34000)
@@ -144,18 +139,15 @@
* ROMP and AVIC
*/
#define MXC91231_ROMP_BASE_ADDR 0x60000000
-#define MXC91231_ROMP_BASE_ADDR_VIRT 0xFC400000
#define MXC91231_ROMP_SIZE SZ_64K
#define MXC91231_AVIC_BASE_ADDR 0x68000000
-#define MXC91231_AVIC_BASE_ADDR_VIRT 0xFC410000
#define MXC91231_AVIC_SIZE SZ_64K
/*
* NAND, SDRAM, WEIM, M3IF, EMI controllers
*/
#define MXC91231_X_MEMC_BASE_ADDR 0xB8000000
-#define MXC91231_X_MEMC_BASE_ADDR_VIRT 0xFC420000
#define MXC91231_X_MEMC_SIZE SZ_64K
#define MXC91231_NFC_BASE_ADDR (MXC91231_X_MEMC_BASE_ADDR + 0x0000)
@@ -183,19 +175,9 @@
/*
* This macro defines the physical to virtual address mapping for all the
* peripheral modules. It is used by passing in the physical address as x
- * and returning the virtual address. If the physical address is not mapped,
- * it returns 0.
+ * and returning the virtual address.
*/
-
-#define MXC91231_IO_P2V(x) ( \
- IMX_IO_P2V_MODULE(x, MXC91231_L2CC) ?: \
- IMX_IO_P2V_MODULE(x, MXC91231_X_MEMC) ?: \
- IMX_IO_P2V_MODULE(x, MXC91231_ROMP) ?: \
- IMX_IO_P2V_MODULE(x, MXC91231_AVIC) ?: \
- IMX_IO_P2V_MODULE(x, MXC91231_AIPS1) ?: \
- IMX_IO_P2V_MODULE(x, MXC91231_SPBA0) ?: \
- IMX_IO_P2V_MODULE(x, MXC91231_SPBA1) ?: \
- IMX_IO_P2V_MODULE(x, MXC91231_AIPS2))
+#define MXC91231_IO_P2V(x) IMX_IO_P2V(x)
#define MXC91231_IO_ADDRESS(x) IOMEM(MXC91231_IO_P2V(x))
/*