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authorTejun Heo <tj@kernel.org>2011-11-28 21:46:22 +0400
committerTejun Heo <tj@kernel.org>2011-11-28 21:46:22 +0400
commitd4bbf7e7759afc172e2bfbc5c416324590049cdd (patch)
tree7eab5ee5481cd3dcf1162329fec827177640018a /arch/arm/plat-mxc/include/mach/mx53.h
parenta150439c4a97db379f0ed6faa46fbbb6e7bf3cb2 (diff)
parent401d0069cb344f401bc9d264c31db55876ff78c0 (diff)
downloadlinux-d4bbf7e7759afc172e2bfbc5c416324590049cdd.tar.xz
Merge branch 'master' into x86/memblock
Conflicts & resolutions: * arch/x86/xen/setup.c dc91c728fd "xen: allow extra memory to be in multiple regions" 24aa07882b "memblock, x86: Replace memblock_x86_reserve/free..." conflicted on xen_add_extra_mem() updates. The resolution is trivial as the latter just want to replace memblock_x86_reserve_range() with memblock_reserve(). * drivers/pci/intel-iommu.c 166e9278a3f "x86/ia64: intel-iommu: move to drivers/iommu/" 5dfe8660a3d "bootmem: Replace work_with_active_regions() with..." conflicted as the former moved the file under drivers/iommu/. Resolved by applying the chnages from the latter on the moved file. * mm/Kconfig 6661672053a "memblock: add NO_BOOTMEM config symbol" c378ddd53f9 "memblock, x86: Make ARCH_DISCARD_MEMBLOCK a config option" conflicted trivially. Both added config options. Just letting both add their own options resolves the conflict. * mm/memblock.c d1f0ece6cdc "mm/memblock.c: small function definition fixes" ed7b56a799c "memblock: Remove memblock_memory_can_coalesce()" confliected. The former updates function removed by the latter. Resolution is trivial. Signed-off-by: Tejun Heo <tj@kernel.org>
Diffstat (limited to 'arch/arm/plat-mxc/include/mach/mx53.h')
-rw-r--r--arch/arm/plat-mxc/include/mach/mx53.h55
1 files changed, 28 insertions, 27 deletions
diff --git a/arch/arm/plat-mxc/include/mach/mx53.h b/arch/arm/plat-mxc/include/mach/mx53.h
index 9d2a1ef84de2..a37e8c353994 100644
--- a/arch/arm/plat-mxc/include/mach/mx53.h
+++ b/arch/arm/plat-mxc/include/mach/mx53.h
@@ -9,6 +9,7 @@
/* TZIC */
#define MX53_TZIC_BASE_ADDR 0x0FFFC000
+#define MX53_TZIC_SIZE SZ_16K
/*
* AHCI SATA
@@ -145,14 +146,14 @@
/*
* Memory regions and CS
*/
-#define MX53_CSD0_BASE_ADDR 0x90000000
-#define MX53_CSD1_BASE_ADDR 0xA0000000
-#define MX53_CS0_BASE_ADDR 0xB0000000
-#define MX53_CS1_BASE_ADDR 0xB8000000
-#define MX53_CS2_BASE_ADDR 0xC0000000
-#define MX53_CS3_BASE_ADDR 0xC8000000
-#define MX53_CS4_BASE_ADDR 0xCC000000
-#define MX53_CS5_BASE_ADDR 0xCE000000
+#define MX53_CSD0_BASE_ADDR 0x70000000
+#define MX53_CSD1_BASE_ADDR 0xB0000000
+#define MX53_CS0_BASE_ADDR 0xF0000000
+#define MX53_CS1_32MB_BASE_ADDR 0xF2000000
+#define MX53_CS1_64MB_BASE_ADDR 0xF4000000
+#define MX53_CS2_64MB_BASE_ADDR 0xF4000000
+#define MX53_CS2_96MB_BASE_ADDR 0xF6000000
+#define MX53_CS3_BASE_ADDR 0xF6000000
#define MX53_IO_P2V(x) IMX_IO_P2V(x)
#define MX53_IO_ADDRESS(x) IOMEM(MX53_IO_P2V(x))
@@ -176,10 +177,10 @@
/*
* DMA request assignments
*/
-#define MX53_DMA_REQ_SSI3_TX1 47
-#define MX53_DMA_REQ_SSI3_RX1 46
-#define MX53_DMA_REQ_SSI3_TX2 45
-#define MX53_DMA_REQ_SSI3_RX2 44
+#define MX53_DMA_REQ_SSI3_TX0 47
+#define MX53_DMA_REQ_SSI3_RX0 46
+#define MX53_DMA_REQ_SSI3_TX1 45
+#define MX53_DMA_REQ_SSI3_RX1 44
#define MX53_DMA_REQ_UART3_TX 43
#define MX53_DMA_REQ_UART3_RX 42
#define MX53_DMA_REQ_ESAI_TX 41
@@ -194,14 +195,14 @@
#define MX53_DMA_REQ_ASRC_DMA1 32
#define MX53_DMA_REQ_EMI_WR 31
#define MX53_DMA_REQ_EMI_RD 30
-#define MX53_DMA_REQ_SSI1_TX1 29
-#define MX53_DMA_REQ_SSI1_RX1 28
-#define MX53_DMA_REQ_SSI1_TX2 27
-#define MX53_DMA_REQ_SSI1_RX2 26
-#define MX53_DMA_REQ_SSI2_TX1 25
-#define MX53_DMA_REQ_SSI2_RX1 24
-#define MX53_DMA_REQ_SSI2_TX2 23
-#define MX53_DMA_REQ_SSI2_RX2 22
+#define MX53_DMA_REQ_SSI1_TX0 29
+#define MX53_DMA_REQ_SSI1_RX0 28
+#define MX53_DMA_REQ_SSI1_TX1 27
+#define MX53_DMA_REQ_SSI1_RX1 26
+#define MX53_DMA_REQ_SSI2_TX0 25
+#define MX53_DMA_REQ_SSI2_RX0 24
+#define MX53_DMA_REQ_SSI2_TX1 23
+#define MX53_DMA_REQ_SSI2_RX1 22
#define MX53_DMA_REQ_I2C2_SDHC2 21
#define MX53_DMA_REQ_I2C1_SDHC1 20
#define MX53_DMA_REQ_UART1_TX 19
@@ -233,7 +234,7 @@
#define MX53_INT_ESDHC2 2
#define MX53_INT_ESDHC3 3
#define MX53_INT_ESDHC4 4
-#define MX53_INT_RESV5 5
+#define MX53_INT_DAP 5
#define MX53_INT_SDMA 6
#define MX53_INT_IOMUX 7
#define MX53_INT_NFC 8
@@ -241,7 +242,7 @@
#define MX53_INT_IPU_ERR 10
#define MX53_INT_IPU_SYN 11
#define MX53_INT_GPU 12
-#define MX53_INT_RESV13 13
+#define MX53_INT_UART4 13
#define MX53_INT_USB_H1 14
#define MX53_INT_EMI 15
#define MX53_INT_USB_H2 16
@@ -262,8 +263,8 @@
#define MX53_INT_UART1 31
#define MX53_INT_UART2 32
#define MX53_INT_UART3 33
-#define MX53_INT_RESV34 34
-#define MX53_INT_RESV35 35
+#define MX53_INT_RTC 34
+#define MX53_INT_PTP 35
#define MX53_INT_ECSPI1 36
#define MX53_INT_ECSPI2 37
#define MX53_INT_CSPI 38
@@ -293,8 +294,8 @@
#define MX53_INT_I2C1 62
#define MX53_INT_I2C2 63
#define MX53_INT_I2C3 64
-#define MX53_INT_RESV65 65
-#define MX53_INT_RESV66 66
+#define MX53_INT_MLB 65
+#define MX53_INT_ASRC 66
#define MX53_INT_SPDIF 67
#define MX53_INT_SIM_DAT 68
#define MX53_INT_IIM 69
@@ -314,7 +315,7 @@
#define MX53_INT_CAN2 83
#define MX53_INT_GPU2_IRQ 84
#define MX53_INT_GPU2_BUSY 85
-#define MX53_INT_RESV86 86
+#define MX53_INT_UART5 86
#define MX53_INT_FEC 87
#define MX53_INT_OWIRE 88
#define MX53_INT_CTI1_TG2 89