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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2006-07-01 23:43:57 +0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-07-01 23:43:57 +0400
commit3f8efdbe73a5bc96e006b2379a8c8d1d8ef52a9d (patch)
tree9171fa7f40177ef34cdcf44b83c9e57687a47ec5 /arch/arm/mm/proc-xscale.S
parenta069c896d0d6c028581089da7a9a9037a63c2803 (diff)
parent22b1908610dd7ff68471cd4fbd383dbdfe5e0ecd (diff)
downloadlinux-3f8efdbe73a5bc96e006b2379a8c8d1d8ef52a9d.tar.xz
Merge nommu branch
Diffstat (limited to 'arch/arm/mm/proc-xscale.S')
-rw-r--r--arch/arm/mm/proc-xscale.S16
1 files changed, 7 insertions, 9 deletions
diff --git a/arch/arm/mm/proc-xscale.S b/arch/arm/mm/proc-xscale.S
index f4aeb7b06911..535395e25a8a 100644
--- a/arch/arm/mm/proc-xscale.S
+++ b/arch/arm/mm/proc-xscale.S
@@ -475,11 +475,12 @@ __xscale_setup:
orr r0, r0, #1 << 6 @ cp6 for IOP3xx and Bulverde
orr r0, r0, #1 << 13 @ Its undefined whether this
mcr p15, 0, r0, c15, c1, 0 @ affects USR or SVC modes
+
+ adr r5, xscale_crval
+ ldmia r5, {r5, r6}
mrc p15, 0, r0, c1, c0, 0 @ get control register
- ldr r5, xscale_cr1_clear
bic r0, r0, r5
- ldr r5, xscale_cr1_set
- orr r0, r0, r5
+ orr r0, r0, r6
mov pc, lr
.size __xscale_setup, . - __xscale_setup
@@ -489,12 +490,9 @@ __xscale_setup:
* ..11 1.01 .... .101
*
*/
- .type xscale_cr1_clear, #object
- .type xscale_cr1_set, #object
-xscale_cr1_clear:
- .word 0x3b07
-xscale_cr1_set:
- .word 0x3905
+ .type xscale_crval, #object
+xscale_crval:
+ crval clear=0x00003b07, mmuset=0x00003905, ucset=0x00001900
__INITDATA