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authorJiri Kosina <jkosina@suse.cz>2010-08-04 17:14:38 +0400
committerJiri Kosina <jkosina@suse.cz>2010-08-04 17:14:38 +0400
commitd790d4d583aeaed9fc6f8a9f4d9f8ce6b1c15c7f (patch)
tree854ab394486288d40fa8179cbfaf66e8bdc44b0f /arch/arm/mm/proc-arm920.S
parent73b2c7165b76b20eb1290e7efebc33cfd21db1ca (diff)
parent3a09b1be53d23df780a0cd0e4087a05e2ca4a00c (diff)
downloadlinux-d790d4d583aeaed9fc6f8a9f4d9f8ce6b1c15c7f.tar.xz
Merge branch 'master' into for-next
Diffstat (limited to 'arch/arm/mm/proc-arm920.S')
-rw-r--r--arch/arm/mm/proc-arm920.S10
1 files changed, 1 insertions, 9 deletions
diff --git a/arch/arm/mm/proc-arm920.S b/arch/arm/mm/proc-arm920.S
index 8be81992645d..86f80aa56216 100644
--- a/arch/arm/mm/proc-arm920.S
+++ b/arch/arm/mm/proc-arm920.S
@@ -69,19 +69,11 @@ ENTRY(cpu_arm920_proc_init)
* cpu_arm920_proc_fin()
*/
ENTRY(cpu_arm920_proc_fin)
- stmfd sp!, {lr}
- mov ip, #PSR_F_BIT | PSR_I_BIT | SVC_MODE
- msr cpsr_c, ip
-#ifndef CONFIG_CPU_DCACHE_WRITETHROUGH
- bl arm920_flush_kern_cache_all
-#else
- bl v4wt_flush_kern_cache_all
-#endif
mrc p15, 0, r0, c1, c0, 0 @ ctrl register
bic r0, r0, #0x1000 @ ...i............
bic r0, r0, #0x000e @ ............wca.
mcr p15, 0, r0, c1, c0, 0 @ disable caches
- ldmfd sp!, {pc}
+ mov pc, lr
/*
* cpu_arm920_reset(loc)