diff options
| author | Thomas Gleixner <tglx@linutronix.de> | 2009-07-03 17:44:46 +0400 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2011-09-13 13:12:14 +0400 |
| commit | bd31b85960a7fcb2d7ede216460b8da71a88411c (patch) | |
| tree | f2ab1a1105705856c5cdfc71bcf3f7b5f897d30d /arch/arm/mm/copypage-xscale.c | |
| parent | a1741e7fcbc19a67520115df480ab17012cc3d0b (diff) | |
| download | linux-bd31b85960a7fcb2d7ede216460b8da71a88411c.tar.xz | |
locking, ARM: Annotate low level hw locks as raw
Annotate the low level hardware locks which must not be preempted.
In mainline this change documents the low level nature of
the lock - otherwise there's no functional difference. Lockdep
and Sparse checking will work as usual.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/arm/mm/copypage-xscale.c')
| -rw-r--r-- | arch/arm/mm/copypage-xscale.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/mm/copypage-xscale.c b/arch/arm/mm/copypage-xscale.c index 649bbcd325bf..610c24ced310 100644 --- a/arch/arm/mm/copypage-xscale.c +++ b/arch/arm/mm/copypage-xscale.c @@ -32,7 +32,7 @@ #define minicache_pgprot __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | \ L_PTE_MT_MINICACHE) -static DEFINE_SPINLOCK(minicache_lock); +static DEFINE_RAW_SPINLOCK(minicache_lock); /* * XScale mini-dcache optimised copy_user_highpage @@ -98,14 +98,14 @@ void xscale_mc_copy_user_highpage(struct page *to, struct page *from, if (!test_and_set_bit(PG_dcache_clean, &from->flags)) __flush_dcache_page(page_mapping(from), from); - spin_lock(&minicache_lock); + raw_spin_lock(&minicache_lock); set_pte_ext(TOP_PTE(COPYPAGE_MINICACHE), pfn_pte(page_to_pfn(from), minicache_pgprot), 0); flush_tlb_kernel_page(COPYPAGE_MINICACHE); mc_copy_user_page((void *)COPYPAGE_MINICACHE, kto); - spin_unlock(&minicache_lock); + raw_spin_unlock(&minicache_lock); kunmap_atomic(kto, KM_USER1); } |