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authorMark Brown <broonie@opensource.wolfsonmicro.com>2012-03-19 01:38:20 +0400
committerMark Brown <broonie@opensource.wolfsonmicro.com>2012-03-19 01:38:20 +0400
commitc592c761a36286ab83451daa37a21c8558ea99c0 (patch)
tree8abf57708fabf2a915320e9515b1ae2730ebf499 /arch/arm/mm/cache-v7.S
parent63236f4038f7e14762114606d95769c32cf6cac1 (diff)
parent33499df88b711725ee473ab5478e17efd21de4b0 (diff)
downloadlinux-c592c761a36286ab83451daa37a21c8558ea99c0.tar.xz
Merge remote-tracking branch 'regulator/topic/stub' into regulator-next
Diffstat (limited to 'arch/arm/mm/cache-v7.S')
-rw-r--r--arch/arm/mm/cache-v7.S6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S
index 07c4bc8ea0a4..a655d3da386d 100644
--- a/arch/arm/mm/cache-v7.S
+++ b/arch/arm/mm/cache-v7.S
@@ -54,9 +54,15 @@ loop1:
and r1, r1, #7 @ mask of the bits for current cache only
cmp r1, #2 @ see what cache we have at this level
blt skip @ skip if no cache, or just i-cache
+#ifdef CONFIG_PREEMPT
+ save_and_disable_irqs_notrace r9 @ make cssr&csidr read atomic
+#endif
mcr p15, 2, r10, c0, c0, 0 @ select current cache level in cssr
isb @ isb to sych the new cssr&csidr
mrc p15, 1, r1, c0, c0, 0 @ read the new csidr
+#ifdef CONFIG_PREEMPT
+ restore_irqs_notrace r9
+#endif
and r2, r1, #7 @ extract the length of the cache lines
add r2, r2, #4 @ add 4 (line length offset)
ldr r4, =0x3ff