diff options
| author | Arnd Bergmann <arnd@arndb.de> | 2012-02-28 16:39:56 +0400 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2012-02-28 16:40:01 +0400 |
| commit | 4d8cfec692e988b844dcaeaeb76b5780b7ef9d28 (patch) | |
| tree | 67d43adab2afd18a74d08f347e3676ae1a64193f /arch/arm/mm/cache-v7.S | |
| parent | a3a3c4664184f86ef964323d106c62158e2b3f25 (diff) | |
| parent | 1d8c38c3d1b48eeb9cfaa42a8be13a1423569eb2 (diff) | |
| download | linux-4d8cfec692e988b844dcaeaeb76b5780b7ef9d28.tar.xz | |
Merge branch 'cleanup-3.4' of git://github.com/hzhuang1/linux into next/cleanup
* 'cleanup-3.4' of git://github.com/hzhuang1/linux: (2 commits)
rtc: sa1100: remove verification code of alarm
rtc: sa1100: remove periodic code
(update to v3.3-rc5)
Diffstat (limited to 'arch/arm/mm/cache-v7.S')
| -rw-r--r-- | arch/arm/mm/cache-v7.S | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S index 07c4bc8ea0a4..a655d3da386d 100644 --- a/arch/arm/mm/cache-v7.S +++ b/arch/arm/mm/cache-v7.S @@ -54,9 +54,15 @@ loop1: and r1, r1, #7 @ mask of the bits for current cache only cmp r1, #2 @ see what cache we have at this level blt skip @ skip if no cache, or just i-cache +#ifdef CONFIG_PREEMPT + save_and_disable_irqs_notrace r9 @ make cssr&csidr read atomic +#endif mcr p15, 2, r10, c0, c0, 0 @ select current cache level in cssr isb @ isb to sych the new cssr&csidr mrc p15, 1, r1, c0, c0, 0 @ read the new csidr +#ifdef CONFIG_PREEMPT + restore_irqs_notrace r9 +#endif and r2, r1, #7 @ extract the length of the cache lines add r2, r2, #4 @ add 4 (line length offset) ldr r4, =0x3ff |