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| author | Philip Derrin <philip@cog.systems> | 2017-11-14 02:55:26 +0300 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2017-11-30 11:40:40 +0300 |
| commit | 30d3389d80eb0c6d2a49ffa07c8fd1eec5a49873 (patch) | |
| tree | 887cc51c33fbb7c07e685dcc14a4f87ee057e750 /arch/arm/mm/cache-tauros2.c | |
| parent | cb7cc998a0e5f0f4572609ccc334de5a6260b406 (diff) | |
| download | linux-30d3389d80eb0c6d2a49ffa07c8fd1eec5a49873.tar.xz | |
ARM: 8721/1: mm: dump: check hardware RO bit for LPAE
commit 3b0c0c922ff4be275a8beb87ce5657d16f355b54 upstream.
When CONFIG_ARM_LPAE is set, the PMD dump relies on the software
read-only bit to determine whether a page is writable. This
concealed a bug which left the kernel text section writable
(AP2=0) while marked read-only in the software bit.
In a kernel with the AP2 bug, the dump looks like this:
---[ Kernel Mapping ]---
0xc0000000-0xc0200000 2M RW NX SHD
0xc0200000-0xc0600000 4M ro x SHD
0xc0600000-0xc0800000 2M ro NX SHD
0xc0800000-0xc4800000 64M RW NX SHD
The fix is to check that the software and hardware bits are both
set before displaying "ro". The dump then shows the true perms:
---[ Kernel Mapping ]---
0xc0000000-0xc0200000 2M RW NX SHD
0xc0200000-0xc0600000 4M RW x SHD
0xc0600000-0xc0800000 2M RW NX SHD
0xc0800000-0xc4800000 64M RW NX SHD
Fixes: ded947798469 ("ARM: 8109/1: mm: Modify pte_write and pmd_write logic for LPAE")
Signed-off-by: Philip Derrin <philip@cog.systems>
Tested-by: Neil Dick <neil@cog.systems>
Reviewed-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'arch/arm/mm/cache-tauros2.c')
0 files changed, 0 insertions, 0 deletions