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authorLinus Torvalds <torvalds@linux-foundation.org>2014-01-24 06:34:03 +0400
committerLinus Torvalds <torvalds@linux-foundation.org>2014-01-24 06:34:03 +0400
commitf341535193c338b4ce4af8e32be51e6aae7f22a6 (patch)
treed054a10be84681b93ce53c348cde0d764e1e24a2 /arch/arm/mm/cache-l2x0.c
parent13c789a6b219aa23f917466c7e630566106b14c2 (diff)
parent857989a7fdd2f6de42272578b8aaa413ed6e63e4 (diff)
downloadlinux-f341535193c338b4ce4af8e32be51e6aae7f22a6.tar.xz
Merge branch 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm
Pull ARM updates from Russell King: "In this set, we have: - Refactoring of some of the old StrongARM-1100 GPIO code to make things simpler by Dmitry Eremin-Solenikov - Read-only and non-executable support for modules on ARM from Laura Abbot - Removal of unnecessary set_drvdata() calls in AMBA code - Some non-executable support for kernel lowmem mappings at the 1MB section granularity, and dumping of kernel page tables via debugfs - Some improvements for the timer/clock code on Footbridge platforms, and cleanup some of the LED code there - Fix fls/ffs() signatures to match x86 to prevent build warnings, particularly where these are used with min/max() macros - Avoid using the bootmem allocator on ARM (patches from Santosh Shilimkar) - Various asid/unaligned access updates from Will Deacon" * 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: (51 commits) ARM: SMP implementations are not supposed to return from smp_ops.cpu_die() ARM: ignore memory below PHYS_OFFSET Fix select-induced Kconfig warning for ZBOOT_ROM ARM: fix ffs/fls implementations to match x86 ARM: 7935/1: sa1100: collie: add gpio-keys configuration ARM: 7932/1: bcm: Add DEBUG_LL console support ARM: 7929/1: Remove duplicate SCHED_HRTICK config option ARM: 7928/1: kconfig: select HAVE_EFFICIENT_UNALIGNED_ACCESS for CPUv6+ && MMU ARM: 7927/1: dcache: select DCACHE_WORD_ACCESS for big-endian CPUs ARM: 7926/1: mm: flesh out and fix the comments in the ASID allocator ARM: 7925/1: mm: keep track of last ASID allocation to improve bitmap searching ARM: 7924/1: mm: don't bother with reserved ttbr0 when running with LPAE ARM: PCI: add legacy IDE IRQ implementation ARM: footbridge: cleanup LEDs code ARM: pgd allocation: retry on failure ARM: footbridge: add one-shot mode for DC21285 timer ARM: footbridge: add sched_clock implementation ARM: 7922/1: l2x0: add Marvell Tauros3 support ARM: 7877/1: use built-in byte swap function ARM: 7921/1: mcpm: remove redundant dsb instructions prior to sev ...
Diffstat (limited to 'arch/arm/mm/cache-l2x0.c')
-rw-r--r--arch/arm/mm/cache-l2x0.c48
1 files changed, 40 insertions, 8 deletions
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index 447da6ffadd5..7abde2ce8973 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -25,6 +25,7 @@
#include <asm/cacheflush.h>
#include <asm/hardware/cache-l2x0.h>
+#include "cache-tauros3.h"
#include "cache-aurora-l2.h"
#define CACHE_LINE_SIZE 32
@@ -767,6 +768,14 @@ static void aurora_save(void)
l2x0_saved_regs.aux_ctrl = readl_relaxed(l2x0_base + L2X0_AUX_CTRL);
}
+static void __init tauros3_save(void)
+{
+ l2x0_saved_regs.aux2_ctrl =
+ readl_relaxed(l2x0_base + TAUROS3_AUX2_CTRL);
+ l2x0_saved_regs.prefetch_ctrl =
+ readl_relaxed(l2x0_base + L2X0_PREFETCH_CTRL);
+}
+
static void l2x0_resume(void)
{
if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & L2X0_CTRL_EN)) {
@@ -821,6 +830,18 @@ static void aurora_resume(void)
}
}
+static void tauros3_resume(void)
+{
+ if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & L2X0_CTRL_EN)) {
+ writel_relaxed(l2x0_saved_regs.aux2_ctrl,
+ l2x0_base + TAUROS3_AUX2_CTRL);
+ writel_relaxed(l2x0_saved_regs.prefetch_ctrl,
+ l2x0_base + L2X0_PREFETCH_CTRL);
+ }
+
+ l2x0_resume();
+}
+
static void __init aurora_broadcast_l2_commands(void)
{
__u32 u;
@@ -906,6 +927,15 @@ static const struct l2x0_of_data aurora_no_outer_data = {
},
};
+static const struct l2x0_of_data tauros3_data = {
+ .setup = NULL,
+ .save = tauros3_save,
+ /* Tauros3 broadcasts L1 cache operations to L2 */
+ .outer_cache = {
+ .resume = tauros3_resume,
+ },
+};
+
static const struct l2x0_of_data bcm_l2x0_data = {
.setup = pl310_of_setup,
.save = pl310_save,
@@ -922,17 +952,19 @@ static const struct l2x0_of_data bcm_l2x0_data = {
};
static const struct of_device_id l2x0_ids[] __initconst = {
- { .compatible = "arm,pl310-cache", .data = (void *)&pl310_data },
- { .compatible = "arm,l220-cache", .data = (void *)&l2x0_data },
{ .compatible = "arm,l210-cache", .data = (void *)&l2x0_data },
- { .compatible = "marvell,aurora-system-cache",
- .data = (void *)&aurora_no_outer_data},
- { .compatible = "marvell,aurora-outer-cache",
- .data = (void *)&aurora_with_outer_data},
- { .compatible = "brcm,bcm11351-a2-pl310-cache",
- .data = (void *)&bcm_l2x0_data},
+ { .compatible = "arm,l220-cache", .data = (void *)&l2x0_data },
+ { .compatible = "arm,pl310-cache", .data = (void *)&pl310_data },
{ .compatible = "bcm,bcm11351-a2-pl310-cache", /* deprecated name */
.data = (void *)&bcm_l2x0_data},
+ { .compatible = "brcm,bcm11351-a2-pl310-cache",
+ .data = (void *)&bcm_l2x0_data},
+ { .compatible = "marvell,aurora-outer-cache",
+ .data = (void *)&aurora_with_outer_data},
+ { .compatible = "marvell,aurora-system-cache",
+ .data = (void *)&aurora_no_outer_data},
+ { .compatible = "marvell,tauros3-cache",
+ .data = (void *)&tauros3_data },
{}
};