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| author | Pawel Moll <pawel.moll@arm.com> | 2011-12-15 14:57:28 +0400 |
|---|---|---|
| committer | Pawel Moll <pawel.moll@arm.com> | 2012-02-24 13:18:21 +0400 |
| commit | 059289b260826deb43601644a7ad39c2608e6861 (patch) | |
| tree | 4fc79d16d7a5b0fc52b8969e909d8dd5e8aaba4c /arch/arm/mach-vexpress/Makefile.boot | |
| parent | cca070a916fb8ba78bb1494a35ae01f20eff5a57 (diff) | |
| download | linux-059289b260826deb43601644a7ad39c2608e6861.tar.xz | |
ARM: vexpress: Add Device Tree for V2P-CA15 core tile (TC1 variant)
This patch adds Device Tree file for the CoreTile Express A15x2
(V2P-CA15) with Test Chip 1.
As the chip's GIC has 160 interrupt inputs and equivalent SMM
(FPGA) has GIC synthesised with 256 interrupts, NR_IRQS is
increased.
Signed-off-by: Pawel Moll <pawel.moll@arm.com>
Diffstat (limited to 'arch/arm/mach-vexpress/Makefile.boot')
| -rw-r--r-- | arch/arm/mach-vexpress/Makefile.boot | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/mach-vexpress/Makefile.boot b/arch/arm/mach-vexpress/Makefile.boot index 2f0ad9fe5f43..909f85ebf5f4 100644 --- a/arch/arm/mach-vexpress/Makefile.boot +++ b/arch/arm/mach-vexpress/Makefile.boot @@ -5,4 +5,5 @@ params_phys-y := 0x60000100 initrd_phys-y := 0x60800000 dtb-$(CONFIG_ARCH_VEXPRESS_DT) += vexpress-v2p-ca5s.dtb \ - vexpress-v2p-ca9.dtb + vexpress-v2p-ca9.dtb \ + vexpress-v2p-ca15-tc1.dtb |