diff options
| author | Rabin Vincent <rabin.vincent@stericsson.com> | 2011-03-29 23:59:51 +0400 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2011-05-25 00:11:45 +0400 |
| commit | 06be2efaf444f6b639892394e0a6afcd73fe1de4 (patch) | |
| tree | 18a3f558219bd81a9d56b5f5e8d0dbcd46a33fcb /arch/arm/mach-ux500/include/mach/irqs-db5500.h | |
| parent | b25962599bcc31cf685127c682931e07167f3d1a (diff) | |
| download | linux-06be2efaf444f6b639892394e0a6afcd73fe1de4.tar.xz | |
mach-ux500: update SoC and board IRQ handling
This splits out a per-SoC IRQ range handling, so that the
DB8500 and DB5500 SoC:s can reuse aproximately the same IRQ
range with the largest span setting the roof. The same change
is done for the boards, mutatis mutandis, with a new file for
the U5500 board.
Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/mach-ux500/include/mach/irqs-db5500.h')
| -rw-r--r-- | arch/arm/mach-ux500/include/mach/irqs-db5500.h | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/arch/arm/mach-ux500/include/mach/irqs-db5500.h b/arch/arm/mach-ux500/include/mach/irqs-db5500.h index bfa123dbec3b..77239776a6f2 100644 --- a/arch/arm/mach-ux500/include/mach/irqs-db5500.h +++ b/arch/arm/mach-ux500/include/mach/irqs-db5500.h @@ -83,4 +83,31 @@ #define IRQ_DB5500_GPIO6 (IRQ_SHPI_START + 125) #define IRQ_DB5500_GPIO7 (IRQ_SHPI_START + 126) +#ifdef CONFIG_UX500_SOC_DB5500 + +/* + * After the GPIO ones we reserve a range of IRQ:s in which virtual + * IRQ:s representing modem IRQ:s can be allocated + */ +#define IRQ_MODEM_EVENTS_BASE IRQ_SOC_START +#define IRQ_MODEM_EVENTS_NBR 72 +#define IRQ_MODEM_EVENTS_END (IRQ_MODEM_EVENTS_BASE + IRQ_MODEM_EVENTS_NBR) + +/* List of virtual IRQ:s that are allocated from the range above */ +#define MBOX_PAIR0_VIRT_IRQ (IRQ_MODEM_EVENTS_BASE + 43) +#define MBOX_PAIR1_VIRT_IRQ (IRQ_MODEM_EVENTS_BASE + 45) +#define MBOX_PAIR2_VIRT_IRQ (IRQ_MODEM_EVENTS_BASE + 41) + +/* + * We may have several SoCs, but only one will run at a + * time, so the one with most IRQs will bump this ahead, + * but the IRQ_SOC_START remains the same for either SoC. + */ +#if IRQ_SOC_END < IRQ_MODEM_EVENTS_END +#undef IRQ_SOC_END +#define IRQ_SOC_END IRQ_MODEM_EVENTS_END +#endif + +#endif /* CONFIG_UX500_SOC_DB5500 */ + #endif |