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| author | Arnd Bergmann <arnd@arndb.de> | 2016-06-20 23:27:23 +0300 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2016-07-12 12:24:06 +0300 |
| commit | 1e6cbc0691abc6b1a053f98d8ce1d692c8c71501 (patch) | |
| tree | 30bc2f7055afc27ad0e40fb1ef402dfe53f7c1d2 /arch/arm/mach-ux500/cache-l2x0.c | |
| parent | 4e657946cbf68998b51b331375a1209e90792fe4 (diff) | |
| download | linux-1e6cbc0691abc6b1a053f98d8ce1d692c8c71501.tar.xz | |
ARM: ux500: move l2x0 init to .init_irq
The generic IRQ init function also enables the l2 cache
implicitly when the machine descriptor sets an .l2c_aux_mask.
Let's use that on ux500 and remove the ux500_l2x0_init()
along with the cpu_is_u8500_family checks.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/mach-ux500/cache-l2x0.c')
| -rw-r--r-- | arch/arm/mach-ux500/cache-l2x0.c | 8 |
1 files changed, 1 insertions, 7 deletions
diff --git a/arch/arm/mach-ux500/cache-l2x0.c b/arch/arm/mach-ux500/cache-l2x0.c index 780bd13cd7e3..d7abc1187769 100644 --- a/arch/arm/mach-ux500/cache-l2x0.c +++ b/arch/arm/mach-ux500/cache-l2x0.c @@ -51,17 +51,11 @@ static void ux500_l2c310_write_sec(unsigned long val, unsigned reg) */ } -static int __init ux500_l2x0_init(void) +void __init ux500_l2x0_init(void) { - /* Multiplatform guard */ - if (!((cpu_is_u8500_family() || cpu_is_ux540_family()))) - return -ENODEV; - /* Unlock before init */ ux500_l2x0_unlock(); outer_cache.write_sec = ux500_l2c310_write_sec; - l2x0_of_init(0, ~0); return 0; } -early_initcall(ux500_l2x0_init); |