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| author | Linus Walleij <linus.walleij@linaro.org> | 2015-05-14 11:06:55 +0300 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2015-05-18 16:07:41 +0300 |
| commit | 583ecab9e36ec3077228cc4e303276856ee7519e (patch) | |
| tree | 63bacc6c6a4c43f5681c34bdd1230375f1b10fb6 /arch/arm/mach-ux500/cache-l2x0.c | |
| parent | c1424803f6467fbbf269a5dfa830d9c60ae32181 (diff) | |
| download | linux-583ecab9e36ec3077228cc4e303276856ee7519e.tar.xz | |
ARM: ux500: kill off L2CC static map
The l2x0 level 2 cache initialization used a static map
to get at the l2x0 registers. Get rid of this by getting
the register range from the device tree and just remap it
for the short time we need it.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/mach-ux500/cache-l2x0.c')
| -rw-r--r-- | arch/arm/mach-ux500/cache-l2x0.c | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/arch/arm/mach-ux500/cache-l2x0.c b/arch/arm/mach-ux500/cache-l2x0.c index e97ee556f92f..7557bede7ae6 100644 --- a/arch/arm/mach-ux500/cache-l2x0.c +++ b/arch/arm/mach-ux500/cache-l2x0.c @@ -6,6 +6,7 @@ #include <linux/io.h> #include <linux/of.h> +#include <linux/of_address.h> #include <asm/hardware/cache-l2x0.h> @@ -15,7 +16,14 @@ static int __init ux500_l2x0_unlock(void) { int i; - void __iomem *l2x0_base = __io_address(U8500_L2CC_BASE); + struct device_node *np; + void __iomem *l2x0_base; + + np = of_find_compatible_node(NULL, NULL, "arm,pl310-cache"); + l2x0_base = of_iomap(np, 0); + of_node_put(np); + if (!l2x0_base) + return -ENODEV; /* * Unlock Data and Instruction Lock if locked. Ux500 U-Boot versions @@ -30,6 +38,7 @@ static int __init ux500_l2x0_unlock(void) writel_relaxed(0x0, l2x0_base + L2X0_LOCKDOWN_WAY_I_BASE + i * L2X0_LOCKDOWN_STRIDE); } + iounmap(l2x0_base); return 0; } |