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| author | Joseph Lo <josephl@nvidia.com> | 2012-11-10 01:40:41 +0400 |
|---|---|---|
| committer | Stephen Warren <swarren@nvidia.com> | 2012-11-10 01:58:40 +0400 |
| commit | ca3d241cb2974852192bdeb896bf5e2c46463286 (patch) | |
| tree | de800c26ff6541a7fea4ff2044a377faf5b1e109 /arch/arm/mach-tegra | |
| parent | ffa05e450c3ce6ece6c5e3bdfc202c86e6d4517f (diff) | |
| download | linux-ca3d241cb2974852192bdeb896bf5e2c46463286.tar.xz | |
ARM: tegra: enable data prefetch on L2
Enable the data prefetch on L2. The bit28 in aux ctrl register.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra')
| -rw-r--r-- | arch/arm/mach-tegra/common.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c index 6c04a18a88d6..89d3ebc06eb3 100644 --- a/arch/arm/mach-tegra/common.c +++ b/arch/arm/mach-tegra/common.c @@ -121,7 +121,7 @@ static void __init tegra_init_cache(void) cache_type = readl(p + L2X0_CACHE_TYPE); aux_ctrl = (cache_type & 0x700) << (17-8); - aux_ctrl |= 0x6C000001; + aux_ctrl |= 0x7C000001; l2x0_of_init(aux_ctrl, 0x8200c3fe); #endif |