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authorJoseph Lo <josephl@nvidia.com>2013-01-03 10:42:59 +0400
committerStephen Warren <swarren@nvidia.com>2013-01-28 21:21:44 +0400
commit57886616ca7bff844a6427436d0c8faf74653f73 (patch)
tree4c353be72a7f266727320189e8e91965b93fa0b0 /arch/arm/mach-tegra/platsmp.c
parent130bfed72c75a36c76ecc82d73818c6fccd2a468 (diff)
downloadlinux-57886616ca7bff844a6427436d0c8faf74653f73.tar.xz
ARM: tegra: update the cache maintenance order for CPU shutdown
Updating the cache maintenance order before CPU shutdown when doing CPU hotplug. The old order: * clean L1 by flush_cache_all * exit SMP * CPU shutdown Adapt to: * disable L1 data cache by clear C bit * clean L1 by v7_flush_dcache_louis * exit SMP * CPU shutdown For CPU hotplug case, it's no need to do "flush_cache_all". And we should disable L1 data cache before clean L1 data cache. Then leaving the SMP coherency. Signed-off-by: Joseph Lo <josephl@nvidia.com> Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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